A 300 µm thick silicon wafer with oxide of 200 A in thickness which prevents void formation is sticked with a sapphire wafer at room temperature. To avoid the crack generation of a silicon wafer, a sticked wafer is heated up to 270C for 2 h and then a silicon layer is removed by grinding from 525 µm to 10 µm. To remove grinding damage and to further thin the silicon layer to 3 µm, KOH etching at 80C is used. Finally, to obtain the silicon layer having the thickness range of 0∼3 µm, polishing is employed. Although the high density of dislocations is observed in the 2.2 µm thick specimen annealed at 900C for 2 h, however, when the specimen is thinned down to 0.2 µm, silicon layer becomes dislocation-free, as confirmed by double crystal X-ray topography and transmission electron microscope (TEM). The thin oxide between silicon and sapphire plays an important role in the prevention of diffusion of boron as a contaminant at the bonded interface.

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