Hafnium oxide (HfO 2 ) is one of the most promising high-k materials to replace SiO 2 as a gate dielectric. Here we report material and electrical characterization of atomic layer deposition ͑ALD͒ hafnium oxide and the correlations between the results. The HfO 2 films were deposited at 200, 300, or 370°C and annealed in a nitrogen ambient at 550, 800, and 900°C. Results indicate that deposition temperature controls both the material and the electrical properties. Materials and electrical properties of films deposited at 200°C are most affected by annealing conditions compared to films deposited at higher temperatures. These films are amorphous as deposited and become polycrystalline after 800°C anneals. Voids are observed after a 900°C anneal for the 200°C deposited films. The 200°C deposited films have charge trapping and high leakage current following anneals at 900°C. The 300°C deposited films have lower chlorine content and remain void-free following high-temperature anneals. These films show a thickness-dependent crystal structure. Annealing the films reduces leakage current by four orders of magnitude. Finally, films deposited at 370°C have the highest density, contain the least amount of impurities, and contain more of the monoclinic phase of HfO 2 than those deposited at 300 and 200°C. The best electrical performance was obtained for films deposited at 370°C.

In this article, we report film properties of HfO2 and La2O3 gate dielectrics grown on Si(100) substrate using atomic layer deposition (ALD) with various surfaces modified before film growth. The precursors used for HfO2 and La2O3 films are hafnium tetrachloride (HfCl4), lanthanum tris[bis(trimethylsilyl)amide] (C18H54N3LaSi6) and water. Pre-deposition treatments examined for HfO2 dielectric films include (1) surface nitridation using NH3, N2O, or NO, (2) substrate annealing in an oxidizing or reducing ambient, and (3) surface fluorination. These results were compared to those obtained using established approaches of growing HfO2 on an OH terminated surface produced chemically. Linear film growth was observed for the HfO2 with all pre-deposition treatments. Time-of-flight-secondary ion mass spectrometry (TOF-SIMS) and transmission electron microscopy (TEM) analysis indicated that all pre-treatments result in good film coverage with no interaction between HfO2 and silicon at the silicon substrate. The as deposited ALD HfO2 film is mainly amorphous, continuous, and relatively smooth on all pretreated Si surface. The thickness of a thin interfacial layer varies depending on the particular pre-treatments. Similar studies were also conducted for the growth of ALD La2O3. In this case, a significant interaction between La2O3 and silicon substrate was observed on films grown directly on chemical oxide. A rough interface between La2O3 and the silicon substrate is clearly seen in XTEM results. This interaction is more significant when the film is deposited at higher temperature. The XTEM images showed that the ALD La2O3 films are mostly amorphous. Results show that independent of surface pre-treatments, interactions between La2O3 and the silicon substrate occur for the deposition conditions explored here. Electrical characterization using evaporated platinum electrodes and mercury probe of the high-k film stacks have been carried out to determine the impact of the pre-treatments on the electrical properties of the films. Results indicated that ALD HfO2 films have higher dielectric constant, lower leakage and better flatband voltage stability during post deposition annealing compared to ALD La2O3 films. These results indicate that ALD HfO2 is a more promising candidate than ALD La2O3 due to superior thermal stability in contact with silicon.

Polycrystalline-silicon (poly-Si) gate compatibility issues with HfO2 and Al2O3 capped HfO2 gate dielectrics are reported. It can be generally stated that chemical vapor deposition (CVD) silicon gates using silane deposited directly onto HfO2 results in electrical properties much worse compared to similar HfO2 films using platinum metal gates. However, depositing CVD silicon gates directly onto Al2O3 capped HfO2 showed greater than a 104 times reduction in gate leakage compared to the poly-Si/HfO2 and poly-Si/SiO2 controls of similar electrical thickness.

As the metal-oxide-semiconductor field-effect transistor ͑MOSFET͒ gate lengths scale down to 50 nm and below, the expected increase in gate leakage will be countered by the use of a high dielectric constant ͑high-k) gate oxide. The series capacitance from polysilicon gate electrode depletion significantly reduces the gate capacitance as the dielectric thickness is scaled to 10 Å equivalent oxide thickness ͑EOT͒ or below. Metal gates promise to solve this problem and address other gate stack scaling concerns like boron penetration and elevated gate resistance. Extensive simulations have shown that the optimal gate work functions for the sub-50 nm channel lengths should be 0.2 eV below ͑above͒ the conduction ͑valence͒ band edge of silicon for n-type MOSFETs (p-type MOSFETs͒. This study summarizes the evaluations of TiN, Ta-Si-N, WN, TaN, TaSi, Ir, and IrO 2 as candidate metals for dual-metal gate complementary metal-oxide semiconductor using HfO 2 as the gate dielectric. The gate work function was determined by fabricating metal-oxidesemiconductor capacitors with varying dielectric thicknesses and different post-gate anneals. The metal-dielectric compatibility was studied by annealing the gate stacks at different temperatures. The gate stacks were characterized using transmission electron microscopy, secondary ion mass spectroscopy, Rutherford backscattering spectroscopy, atomic force microscopy, and x-ray diffraction. Based on work functions and thermal stability, Ta-Si-N and TaN show the most promise as metal electrodes for HfO 2 n-MOSFETs.

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