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This paper discusses the transmission line pulse (TLP) analysis, generally used for electrostatic discharge (ESD) device characterization, as high potential usable tool also for non-ESD structures.TLP technique, combined with DC and pulsed I-V characterization, is performed to study the contribution of trap states on current conduction in metal-insulator-metal (MIM) capacitors with an HfAlO stack. The importance of the above mentioned methods is demonstrated by comparing two generations of samples with slightly different charge trapping mechanisms; their impact on the current conduction is furthermore studied by decreasing the pulse width down to 50nsec.TLP analysis is finally discussed as interesting method to investigate the influence of trap states on the device robustness. The evaluation of breakdown voltage for different time pulses allows to discriminate whether different failure mechanisms occur or not and to establish the impact of trap states on short-term reliability.