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In this paper we describe the linear SIC scheme based on matrix-algebra. We show that the linear SIC schemes (single-and multi-stage) correspond to linear matrix ltering that can be performed directly on the received chip-matched ltered signal vector without explicitly performing the interference cancellation. This leads to an analytical expression for calculating the resulting bit error rate which is of particular use for short-code systems. Convergence issues are discussed and it is shown that the simple implementation of the linear SIC provides similar or better performance than the decorrelator at only a few stages. The concept ofconvergence is introduced to determine the number of stages required for practical convergence for both short and long codes. It has previously been observed that the linear SIC has an optimum number of stages for which the bit error rate is minimised. This behaviour is here related to the mean squared error which can be used to estimate the number of stages required to minimise the bit error rate.

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