A ZnO nanowire behaves like a rectifier under bending strain, as demonstrated by its current–voltage characteristics (see graph). This is interpreted with the consideration of a piezoelectricity‐induced potential energy barrier at the interface of the conductive tip and nanowire (see schematic). Under appropriate bending and voltage control, each NW could correspond to a device element for random‐access‐memory, diode, and force‐sensor applications.

We report the formation of PtSi nanowires, PtSi/Si/PtSi nanowire heterostructures, and nanodevices from such heterostructures. Scanning electron microscopy studies show that silicon nanowires can be converted into PtSi nanowires through controlled reactions between lithographically defined platinum pads and silicon nanowires. High-resolution transmission electron microscopy studies show that PtSi/Si/PtSi heterostructure has an atomically sharp interface with epitaxial relationships of Si[110]//PtSi[010] and Si(111)//PtSi(101). Electrical measurements show that the pure PtSi nanowires have low resistivities approximately 28.6 microOmega.cm and high breakdown current densities>1x10(8) A/cm2. Furthermore, using single crystal PtSi/Si/PtSi nanowire heterostructures with atomically sharp interfaces, we have fabricated high-performance nanoscale field-effect transistors from intrinsic silicon nanowires, in which the source and drain contacts are defined by the metallic PtSi nanowire regions, and the gate length is defined by the Si nanowire region. Electrical measurements show nearly perfect p-channel enhancement mode transistor behavior with a normalized transconductance of 0.3 mS/microm, field-effect hole mobility of 168 cm2/V.s, and on/off ratio>10(7), demonstrating the best performing device from intrinsic silicon nanowires.

Nanoheterostructures of NiSi/Si/NiSi in which the length of the Si region can be controlled down to 2 nm have been produced using in situ point contact reaction between Si and Ni nanowires in an ultrahigh vacuum transmission electron microscope. The Si region was found to be highly strained (more than 12%). The strain increases with the decreasing Si layer thickness and can be controlled by varying the heating temperature. It was observed that the Si nanowire is transformed into a bamboo-type grain of single-crystal NiSi from both ends following the path with low-activation energy. We propose the reaction is assisted by interstitial diffusion of Ni atoms within the Si nanowire and is limited by the rate of dissolution of Ni into Si at the point contact interface. The rate of incorporation of Ni atoms to support the growth of NiSi has been measured to be 7 x 10(-4) s per Ni atom. The nanoscale epitaxial growth rate of single-crystal NiSi has been measured using high-resolution lattice-imaging videos. On the basis of the rate, we can control the consumption of Si and, in turn, the dimensions of the nanoheterostructure down to less than 2 nm, thereby far exceeding the limit of conventional patterning process. The controlled huge strain in the controlled atomic scale Si region, potential gate of Si nanowire-based transistors, is expected to significantly impact the performance of electronic devices.