No abstract

To generate numerous gating signals at a fast rate, industry controllers of Modular Multilevel Converter (MMC) usually implement the pulse generation function in fieldprogrammable gate array (FPGA) boards. Many methods of sub-module (SM) capacitor voltage balance control (VBC) require knowing the gating signals and are therefore also implemented in same FPGA. As the number of SM in an MMC increases, both the latency and required resources for the implementation could become too large to meet the control requirements or fit into the FPGA. Conventional methods impose a limitation on the design of large MMC. This paper presents a pulse generation and VBC method that is optimized for FPGA implementation. With least comparison operation, this method produces the same valve voltage as other modulation methods. And it removes the need for a sorting operation in VBC, which is the main difficulty in FPGA implementation. The proposed method is implemented in the FPGA based RT-LAB real time simulator and tested in a hardware-in-the-loop setup. The performance of this method is validated in various tests.

In this paper a single-phase transformer-less hybrid series active filter (THSeAF) based on duo-neutral-point-clamped (D-NPC) converter to address distribution level power quality is proposed to investigate experimentally the efficiency of the hardware-in-the-loop (HIL) implementation for power electronics applications. This benchmark contributes to demonstrating the capability and efficiency of such real-time implementation for smart grid power quality (PQ) analysis which requires fast switching process with small sampling time. Such applications require the compensator to address major power quality issues related to a nonlinear load. This compensator presents an efficient and reliable solution for future grid applications to overcome voltage and current related issues as well as assisting the integration of renewables for a sustainable supply. The controller extracts voltage and current harmonics to be compensated. A proportional and resonant (P + R) regulator produces switching signals for the D-NPC converter. The paper demonstrates the reliability of the HIL simulation for power electronic applications assessing power quality related issues where a wide range of switching frequency is under study. A combination of simulation and real-time results are carried out to validate the performance and viability of the HIL implementation. INDEX TERMS Duo-neutral-point-clamped (D-NPC) converter, hardware-in-the-loop, single-phase active filter, power quality of smart grid, real-time application.

No abstract

In this study, a new control method dedicated to modular multilevel converters (MMCs) is proposed. The approach is based on local communication between the individual controls of each submodule (SM). The local values of the capacitor voltages and the carrier-phase angles are shared between immediate neighbours achieving balancing of their capacitor voltages, and an automatic interleaving of the pulse-width modulation (PWM) signals. Using an inter-cell communication strategy, the number of required data exchanges with a centralised controller is greatly reduced. This method works for any number of SMs present in the converter and provides an integrated dynamic reconfiguration capability to enable or disable SMs during operation, without any additional consideration for the control-algorithm's implementation. Such a capability is not offered by classical MMC control methods using either PWM or nearest-level control strategies. Higher stability, robustness and larger bandwidth of the proposed method are first demonstrated through real-time simulation. The auto-interleaving of the PWM carriers and the capacitor-voltage balancing, provide fast responses and adequate accuracy. Experimental results are provided using a 600 V/3 kW/18 cells single-phase MMC demonstrator confirming the simulation results, and the advantages of this SM control strategy.