Summary
The classical complementary metal–oxide–semiconductor (CMOS) Schmitt trigger (ST) circuit operating in strong inversion has been used as a basic building block in electronics since the 70s. However, no appropriate analytical models for determining the hysteresis threshold voltages have been presented. In this paper, we review the classical CMOS ST formulation for operation in strong inversion and introduce a new model for calculating the hysteresis window. In order to validate the approximations employed in this work, we measured the hysteresis curve for several combinations of transistors available in the popular off‐the‐shelf CD4007 and resorted to simulation in a 180‐nm technology for the specific purpose of measuring the ST window in terms of the transistors aspect ratios. Numerical, experimental, and simulation results corroborate the approximations employed in this research to derive simple expressions for the hysteresis threshold voltages.
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