Abstract-Digital PID controller is one of the most powerful and efficient controller, which is widely used in industrial control systems. PID controllers can be implemented through either by microprocessors or they can be implemented through FPGA. FPGA based PID controllers are more advantageous in terms of speed and power consumption as compared to software based. Here we design two diverse realizations of FPGA based digital PID controller. One realization is multiplier based which needs multipliers for its implementation and other realization is multiplierless, which is implemented through Distributed Arithmetic Look Up Table (DALUT) method. Distributed arithmetic is an efficient technique to compute inner products using Look Up Tables (LUT). DALUT based PID controller is more efficient because it utilizes less power and hardware resources. Both realizations are simulated in Matlab/Simulink environment. Xilinx SysGen is used to translate both the realizations to bit stream which then can be synthesized, implemented and downloaded to the target FPGA using Xilinx ISE Project Navigator. The results obtained are very helpful for comparative analysis of both the realizations.