-Most of the algorithms implemented in FPGAs used to be fixed-point. Floating-point operations are useful for computations involving large dynamic range, but they require significantly more resources than integer operations. With the current trends in system requirements and available FPGAs, floating-point implementations are becoming more common and designers are increasingly taking advantage of FPGAs as a platform for floating-point implementations. The rapid advance in Field-Programmable Gate Array (FPGA) technology makes such devices increasingly attractive for implementing floating-point arithmetic. Compared to Application Specific Integrated Circuits, FPGAs offer reduced development time and costs. Moreover, their flexibility enables field upgrade and adaptation of hardware to run-time conditions. A 32 bit floating point arithmetic unit with IEEE 754 Standard has been designed using VHDL code and all operations of addition, subtraction, multiplication and division are tested on Xilinx. Thereafter, Simulink model in MAT lab has been created for verification of VHDL code of that Floating Point Arithmetic Unit in Modelsim.

CAM (content-addressable memory) is a specialized type of high-speed memory that searches its entire contents in a single clock cycle. We are designing generalized CAM using Dual Port RAM (random access memory) structure which will perform match operation in addition to read and write operation .The design has fast search capabilities while consuming least system resources as possible.CAM provides performance advantage over other search algorithms as searching is based on content rather than address unlike RAM. The match time of our CAM structure is faster and resources are more effective.CAM is used in application where search time is very critical. content addressable memory compare input search data against stored data and return address of matched data. Thus overall function of CAM is to take search word and return matching memory location.

Abstract-Simulations and prototyping have been a very important part of the electronics industry since a very long time. In recent years, FPGA's have become increasingly important and have found their way into all kind of digital system design This paper presents a novel, easy and efficient approach of implementation and verification of VHDL code using Simulink and then to regenerate the optimized VHDL code again using Simulink. The VHDL code written for the complicated digital design of 32-bit floating point arithmetic unit has been synthesized on Xilinx, verified and simulated on Simulink. The same VHDL code in Modelsim was optimized using this approach and the optimized code so generated by Simulinkhas also been synthesized to compare the results. Power dissipations for both synthesized designs using Xilinx Power Estimator were also extracted for comparison.