A low-temperature (< 300 • C) low-stress microelectromechanical systems fabrication process based on a silicon carbide structural layer is presented. A partially conductive sintered target enables low-temperature dc sputtering of amorphous silicon carbide (SiC) at high deposition rates (75 nm/min). The low stress of the structural film allows for mechanically reliable structures to be fabricated, while the low-temperature deposition allows for pre-SiC metallization. The process is designed for low-cost film deposition and for complementary metal-oxide-semiconductor postintegration, stemming from chemical and thermal compatibility. Process flow, deposition, etching, and stress control are discussed, and a detailed process characterization is reported.[
2010-0235]Index Terms-Complementary metal-oxide-semiconductor (CMOS) compatible, direct current (dc) sputtering, low temperature, microelectromechanical systems (MEMS), silicon carbide (SiC), stress control, surface micromachining.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.