Waveform generation plays a key role in RADAR, communications, and electronic warfare. As signal processing hardware and algorithms have become more sophisticated, waveform bandwidth and complexity have increased. We present an architecture for a versatile waveform generator that is suited to wideband systems and natively supports many popular modulation schemes. Real-time generation reduces memory requirements compared with systems that must pre-compute complicated modulations, and enables intra-pulse and inter-pulse waveform agility. The design is implemented and tested on a Xilinx Virtex 6 FPGA card with a 2.5 GSps digital to analog converter.

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Abstract-Ordered-statistic constant false alarm rate (OS-CFAR) detectors provide improved robustness over cellaveraging CFAR (CA-CFAR) detectors in multiple target and heterogeneous clutter environments. However, this benefit comes at the cost of generally increased processing time due to the need for a rank-ordering of the CFAR training data. Realtime implementations of OS-CFAR must consider this additional processing burden.In this paper, we present real-time FPGA and CPU/GPU implementations of OS-CFAR. A novel sorting architecture that scales linearly with window size is presented alongside traditional compare-and-swap and rank-only architectures in an FPGA. A rank-only GPU implementation is demonstrated alongside multi-threaded sorting and rank-only CPU implementations. Effects of training window size on throughput and power consumption are considered.