The development process of complex systems needs to take in account differents domains and aspects. SysML (Systems Modeling Language) is a new modeling language that allows a system description with various integrated diagrams (as structure, behavior and requirements diagrams), but SysML lacks formality for the requirement verification. The aim of this paper is to propose an approach to verify complex systems using SysML as a language which describes the system structure and requirements. Petri nets and temporal logic LTL are used respectively to formalize the system behavior and requirements. The benefit of such formalization is to allow an automatic formal verification. In order to demonstrate this methodology, it will be used a factory automation system, modeled by SysML and Petri nets, and verified by the TINA toolbox.
The complexity increase and variety of equipments controlled by embedded computers generate the need of a multidisciplinary approach for the process of development of those equipments, involving the areas of software, mechanics, electric and electronic engineering. System engineering uses different techniques to concurrently integrate these different views. In this sense, it is being specified by OMG a modeling language, denominated SysML (System Modeling Language). It intends to include in a single specification an integrated view of the system, one that includes hardware, software and electro-mechanics parts. The objective of this paper is to do an empirical evaluation of the modeling language SysML, in the sense of identifying its capacities and its limitations for the modeling of embedded systems. For that purpose, an electronic fuel injection system developed by Department of Automation and Systems at our university will be used.
Abstract-In the development of a real-time embedded control system it is necessary several types of professionals. The control engineer's tool is the functional block diagram, since it describes the mathematical models of the controller being designed. Many development tools that use block diagrams also automatically generate code. The objective of this work is to show how it is possible to evaluate, through an algebraic model, the timing behavior of the multitask system generated automatically by Simulink/MatLab, together with its real-time microkernel. This modeling allows the control engineer a better understanding of the timing behavior of the tasks, including the identification of delay and jitter problems.
electrical and others engineers). The objective of this work is to evaluate the SysML proposal as a description language for industrial systems through the modeling of an industrial automation experimental unit.A brief system description of the case study will be made, the SysML diagrams will be presented during the system modeling and finally the comments and considerations about the models and the modeling task.
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