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A superconducting integrated circuit fabrication process has been developed to encompass a wide range of applications such as Josephson voltage standards, VLSI scale array oscillators, SQUIDS, and kinetic-inductance-based devices. An optimal Josephson junction process requires low temperature processing for all deposition and etching steps. This low temperature process involves an electron cyclotron resonance-based plasma-enhanced chemical vapor deposition of SiO, films for interlayer dielectrics. Experimental design and statistical process control techniques have been used to ensure high quality oxide films. Oxide and niobium etches include endpoint detection and controlled overetch of all 6lms. An overview of the fabrication process is presented.

We have developed an in situ process for fabricating high transition temperature superconductor-normal metal-superconductor microbridges using a step edge to define the normal metal length. Critical current-normal resistance products over 1 mV have been measured at low temperature in devices with high-resistivity Ag-Au alloy bridges. Results on samples with Ag bridges are compared with the alloy data as an initial test of recent theories of SNS Josephson junctions. Josephson effects have been demonstrated in these devices at temperatures higher than 80 K. Clearly defined rf steps have been observed, with power dependence qualitatively similar to theoretical predictions.

YBaCuO films by rf magnetron sputtering using single composite targets: Superconducting and structural properties Appl. Phys. Lett. 52, 1735 (1988); 10.1063/1.99716 RF sputter deposition of YBaCuO superconducting thin films from an oxide powder target AIP Conf.

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