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In applications with segmented high purity Ge detectors or other detector arrays with tens or hundreds of channels, where the high development cost and limited flexibility of application specific integrated circuits outweigh their benefits of low power and small size, the readout electronics typically consist of multi-channel data acquisition modules in a common chassis for power, clock and trigger distribution, and data readout. As arrays become larger and reach several hundred channels, the readout electronics have to be divided over several chassis, but still must maintain precise synchronization of clocks and trigger signals across all channels. This division becomes necessary not only because of limits given by the instrumentation standards on module size and chassis slot numbers, but also because data readout times increase when more modules share the same data bus and because power requirements approach the limits of readily available power supplies. In this paper, we present a method for distributing clocks and triggers between 4 PXI chassis containing DGF Pixie-16 modules with up to 226 acquisition channels per chassis in a data acquisition system intended to instrument the over 600 channels of the SeGA detector array at the National Superconducting Cyclotron Laboratory. Our solution is designed to achieve synchronous acquisition of detector waveforms from all channels with a jitter of less then 1 ns, and can be extended to a larger number of chassis if desired.

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We have developed a digital signal processing module for real time processing of time-division multiplexed data from SQUID-coupled transition-edge sensor microcalorimeter arrays. It is a 3U PXI card consisting of a standardized core processor board and a daughter board. Through fiber-optic links on its front panel, the daughter board receives time-division multiplexed data (comprising error and feedback signals) and clocks from the digital-feedback cards developed at the National Institute of Standards and Technology. After mixing the error signal with the feedback signal in a field-programmable gate array, the daughter board transmits demultiplexed data to the core processor. Real-time processing in the field-programmable gate array of the core processor board includes pulse detection, pileup inspection, pulse height computation, and histogramming into on-board spectrum memory. Data from up to 128 microcalorimeter pixels can be processed by a single module in real time. Energy spectra, waveform, and run statistics data can be read out in real time through the PCI bus by a host computer at a maximum rate of ~100 MB/s. The module's hardware architecture, mechanism for synchronizing with NIST's digital-feedback, and count rate capability are presented.