This paper presents the design and measurements of a 40 nm CMOS BPSK and multilevel ASK receiver for wired connections through a plastic waveguide, operating at 87 GHz. In a measurement setup containing the receiver chip with bondwire dipole antenna and a long piece of polypropylene waveguide with a rectangular cross-section of 2.2 mm by 0.9 mm, a maximum datarate of 9 Gbit/s over a distance of 60 cm and 2.5 Gbit/s over a distance of 9 m is measured, both with a bit error rate of less than 10 −12 and a PRBS length of 2 7 − 1. The chip consumes 50 mW of DC power from a 0.9 V supply. The total chip area is 2.1 mm 2 , of which 52 % is occupied by the antenna and reflector.

The design and measurements of a 200 GHz downconverter in 90 nm standard CMOS are presented. A positive conversion gain of +6.6 dB, a noise figure of 29.9 dB and an output bandwidth of 3 GHz are measured for an LO power of −14.9 dBm. The conversion gain remains within 3 dB for an RF frequency between 186 and 212 GHz. Downconversion of BPSK and QPSK signals is demonstrated with eye diagrams and constellation plots with data rates over 4 Gbit/s. A mathematical analysis is made of the MOSFETs in the triode region and a new small-signal parameter κ is introduced, which enables the design of the mixing transistors for minimum conversion loss.

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Plastic waveguide links are proposed as a costfriendly, light-weight and EMI-robust alternative for copper and optical interconnects for Gbps data transfer up to 10 m. Measured properties of the rectangular polypropylene waveguide such as dielectric loss and bending loss are reported. The design and measurements of a 90-GHz injectionlocked ASK receiver in 40-nm CMOS are presented. The link is demonstrated with the receiver chip and a plastic waveguide with lengths up to 9 m. The highest achieved bit rate is 9 Gbps for a distance of 60 cm and 2.5 Gbps for a distance of 9 m with a BER < 10 12 . With a power consumption of 50 mW from a 0.9 V supply, the best FOM is 2.2 pJ/bit/m.

A 200 GHz downconverter in 90 nm standard CMOS is presented with a measured positive conversion gain of +6.6 dB and an IF bandwidth of 3 GHz for an LO power of −14.9 dBm. The conversion gain has a flatness of ±1.5 dB in an LO frequency range of 26 GHz. The IIP3 is −5.4 dBm. BPSK and QPSK data downconversion are demonstrated with a data rate of over 4 Gbit/s.