The best-worst method (BWM) is a multi-criteria decision-making method which finds the optimal weights of a set of criteria based on the preferences of only one decision-maker (DM) (or evaluator). However, it cannot amalgamate the preferences of multiple decision-makers/evaluators in the so-called group decision-making problem. A typical way of aggregating the preferences of multiple DMs is to use the average operator, e.g., arithmetic or geometric mean. However, averages are sensitive to outliers and provide restricted information regarding the overall preferences of all DMs. In this paper, a Bayesian BWM is introduced to find the aggregated final weights of criteria for a group of DMs at once. To this end, the BWM framework is meaningfully viewed from a probabilistic angle, and a Bayesian hierarchical model is tailored to compute the weights in the presence of a group of DMs. We further introduce a new ranking scheme for decision criteria, called credal ranking , where a confidence level is assigned to measure the extent to which a group of DMs prefers one criterion over one another. A weighted directed graph visualizes the credal ranking based on which the interrelation of criteria and confidences are merely understood. The numerical example validates the results obtained by the Bayesian BWM while it yields much more information in comparison to that of the original BWM.

No abstract

Reversible logic circuits have received significant attention in quantum computing, low power CMOS design, optical information processing, DNA computing, bioinformatics, and nanotechnology. This paper presents two new 4 × 4 bit reversible multiplier designs which have lower hardware complexity, less garbage bits, less quantum cost and less constant inputs than previous ones, and can be generalized to construct efficient reversible n×n bit multipliers. An implementation of reversible HNG is also presented. This implementation shows that the full adder design using HNG is one of the best designs in term of quantum cost. An implementation of MKG is also presented in order to have a fair comparison between our proposed reversible multiplier designs and the existing counterparts. The proposed reversible multipliers are optimized in terms of quantum cost, number of constant inputs, number of garbage outputs and hardware complexity. They can be used to construct more complex systems in nanotechnology.

Reversible logic and binary coded decimal (BCD) arithmetic are two concerning subjects of hardware. This paper proposes a modular synthesis method to realize a reversible BCD-full adder (BCD-FA) and subtractor circuit. We propose three approaches to design and optimize all parts of a BCD-FA circuit using genetic algorithm and don't care concept. Our first approach is based on the Hafiz's work, and the second one is based on the whole BCD-FA circuit design. In the third approach, a binary to BCD converter is presented. Optimizations are done in terms of number of gates, number of garbage inputs/outputs, and the quantum cost of the circuit. We present four designs for BCD-FA with four different goals: minimum garbage inputs/outputs, minimum quantum cost, minimum number of gates, and optimum circuit in terms of all the above parameters.

No abstract