The main em phasis of this study is the investigation of the gate degradation or rupture, aiming to determine the nature of the so-called SEGR phenomena. This article presents experimental data showing heavy ions induced gate degradation in power MOSFETs. In the experiments, backside and front-side irradiations are performed. The heavy ions ranges are tuned in such way to control whether they hit the gate or not, during backside irradiation. Gate-to-source current Igss (4)) is measured versus Heavy Ions (H.I.) fluence 4>. Post-irradiation-Gate-StressTest (PGST) allows to measure breakdown voltage VBD(4)) as being decreasing with (H.I.) fluence. Based on these experimental results, an hypothesis of substrate-generated "hot carriers" impact overlap may explain gate degradation until SEGR triggering. This last hypothesis is supported by statistical approach model of heavy ions multiple impact.