Resistive switching (RS) is an interesting property shown by some materials systems that, especially during the last decade, has gained a lot of interest for the fabrication of electronic devices, with electronic nonvolatile memories being those that have received the most attention. The presence and quality of the RS phenomenon in a materials system can be studied using different prototype cells, performing different experiments, displaying different figures of merit, and developing different computational analyses. Therefore, the real usefulness and impact of the findings presented in each study for the RS technology will be also different. This manuscript describes the most recommendable methodologies for the fabrication, characterization, and simulation of RS devices, as well as the proper methods to display the data obtained. The idea is to help the scientific community to evaluate the real usefulness and impact of an RS study for the development of RS technology.

Resistive switching (RS) devices are emerging electronic components that could have applications in multiple types of integrated circuits, including electronic memories, true random number generators, radiofrequency switches, neuromorphic vision sensors, and artificial neural networks. The main factor hindering the massive employment of RS devices in commercial circuits is related to variability and reliability issues, which are usually evaluated through switching endurance tests. However, we note that most studies that claimed high endurances >106 cycles were based on resistance versus cycle plots that contain very few data points (in many cases even <20), and which are collected in only one device. We recommend not to use such a characterization method because it is highly inaccurate and unreliable (i.e., it cannot reliably demonstrate that the device effectively switches in every cycle and it ignores cycle-to-cycle and device-to-device variability). This has created a blurry vision of the real performance of RS devices and in many cases has exaggerated their potential. This article proposes and describes a method for the correct characterization of switching endurance in RS devices; this method aims to construct endurance plots showing one data point per cycle and resistive state and combine data from multiple devices. Adopting this recommended method should result in more reliable literature in the field of RS technologies, which should accelerate their integration in commercial products.

Exploiting the excellent electronic properties of two-dimensional (2D) materials to fabricate advanced electronic circuits is a major goal for the semiconductor industry1,2. However, most studies in this field have been limited to the fabrication and characterization of isolated large (more than 1 µm2) devices on unfunctional SiO2–Si substrates. Some studies have integrated monolayer graphene on silicon microchips as a large-area (more than 500 µm2) interconnection3 and as a channel of large transistors (roughly 16.5 µm2) (refs. 4,5), but in all cases the integration density was low, no computation was demonstrated and manipulating monolayer 2D materials was challenging because native pinholes and cracks during transfer increase variability and reduce yield. Here, we present the fabrication of high-integration-density 2D–CMOS hybrid microchips for memristive applications—CMOS stands for complementary metal–oxide–semiconductor. We transfer a sheet of multilayer hexagonal boron nitride onto the back-end-of-line interconnections of silicon microchips containing CMOS transistors of the 180 nm node, and finalize the circuits by patterning the top electrodes and interconnections. The CMOS transistors provide outstanding control over the currents across the hexagonal boron nitride memristors, which allows us to achieve endurances of roughly 5 million cycles in memristors as small as 0.053 µm2. We demonstrate in-memory computation by constructing logic gates, and measure spike-timing dependent plasticity signals that are suitable for the implementation of spiking neural networks. The high performance and the relatively-high technology readiness level achieved represent a notable advance towards the integration of 2D materials in microelectronic products and memristive applications.

An in-depth study of reset processes in RRAMs (Resistive Random Access Memories) based on Ni/HfO2/Si-n+ structures has been performed. To do so, we have developed a physically based simulator where both ohmic and tunneling based conduction regimes are considered along with the thermal description of the devices. The devices under study have been successfully fabricated and measured. The experimental data are correctly reproduced with the simulator for devices with a single conductive filament as well as for devices including several conductive filaments. The contribution of each conduction regime has been explained as well as the operation regimes where these ohmic and tunneling conduction processes dominate.

Two-dimensional (2D) material-based memristors have shown several properties that are not shown by traditional ones, such as high transparency, robust mechanical strength and flexibility, superb chemical stability, enhanced thermal heat dissipation, ultralow power consumption, coexistence of bipolar and threshold resistive switching, and ultrastable relaxation when used as electronic synapse (among others). However, several electrical performances often required in memristive applications, such as the generation of multiple stable resistive states for highdensity information storage, still have never been demonstrated. Here, we present the first 2D material-based memristors that exhibit three stable and well-distinguishable resistive states. By using a multilayer hexagonal boron nitride (h-BN) stack sandwiched by multilayer graphene (G) electrodes, we fabricate 5 μm × 5 μm cross-point Au/Ti/G/h-BN/G/Au memristors that can switch between each two or three resistive states, depending on the current limitation (CL) and reset voltage used. The use of graphene electrodes plus a small cross-point structure are key elements to observe the tristate operation, which has not been observed in larger (100 μm × 100 μm) devices with an identical Au/Ti/G/h-BN/G/Au structure nor in similar small (5 μm × 5 μm) devices without graphene interfacial layers (i.e., Au/Ti/h-BN/Au). Basically, we generate an intermediate state between the high resistive state and the low resistive state (LRS), named soft-LRS (S-LRS), which may be related to the formation of a narrower conductive nanofilament across the h-BN because of the ability of graphene to limit metal penetration (at low CLs). All the 2D materials have been fabricated using the scalable chemical vapor deposition approach, which is an immediate advantage compared to other works using mechanical exfoliated 2D materials.