This paper presents the design, the validation steps and the measurement results of a fault generator device able to disturb the operation of a PROFIBUS DP network, under userdefined conditions. It allows to test the robustness of an industrial network, to test and compare diagnostic tools, and to investigate off-line more complex faults encountered in industry. The core of the design is an FPGA, which results in a very low latency time. It generates trigger signals and imposes faults on the RS485 level up to the maximum bit rate of 12 Mbps. The design choices for fault duration, number of successive faults and skipped triggers, waiting time, etc. allow for the emulation of a wide range of network faults.
The revamping of a machine manufacturer's line of high speed processing machines aims to reuse existing validated STEP 7 code. The distributed networked sensing architecture is required to pick out a single analog measurement with 50 µs resolution at specific encoder sample hits, using off-the-shelf PROFINET I/O.A solution using an oversampling technique on a remote I/O device combined with a low-cost "streaming CPU" running in isochronous processing mode and acting as sync master in PROFINET IRT is proposed. The distributed architecture connects a main CPU to the streaming CPU, the latter configured as I-Device in a 2 nd PROFINET RT network.Overall distributed architecture, accurate reconstruction of the signal timing, network load and the signal propagation are analysed.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.