This paper describes a printed rectangular-plate monopole, fed by microstrip line.The effect of varying plate width, feed-gap height and feedline width on the impedance bandwidth is examined. It is shown that for a fixed ground-plane size, that optimisation of these parameters can yield an impedance bandwidth ratio of 4.3:1, without using any broadbanding techniques.

No abstract

designed antenna consists of three pairs of split-ring loops and a tapered transmission line. The simulated and measured results show that the proposed UWB antenna has a wide bandwidth from 2 to 20 GHz, and all the measured return losses are less than 010 dB in this band.The graph of the magnitude of the transfer function is relatively smooth combined with a flat group delay in the measured band. The simple planar geometry also makes it compatible with the existing microwave integrated circuit. REFERENCES Antenna Optimization With a Computationally Efficient Multiobjective Evolutionary AlgorithmMatthias John and Max J. AmmannAbstract-An efficient multiobjective evolutionary algorithm is described for optimizing a novel spline based printed monopole antenna. The antenna geometry is based on spline outlines. Both radiating element and groundplane are simultaneously optimized by the algorithm. The resulting antenna performance is evaluated. It is shown that the evolutionary algorithm and the spline geometry can be used to efficiently generate ultrawideband antennas on limited computing resources.Index Terms-Antenna optimization, multiobjective evolutionary algorithm, ultrawideband (UWB) antenna, spline.

No abstract

This paper investigates design considerations and challenges of integrating on-chip antennas in nanoscale CMOS technology at millimeter-wave (mm-wave) to achieve a compact front-end receiver for 5G communication systems. Solutions to overcome these challenges are offered and realized in digital 28-nm CMOS. A monolithic on-chip antenna is designed and optimized in the presence of rigorous metal density rules and other back-end-of-the-line (BEoL) challenges of the nanoscale technology. The proposed antenna structure further exploits ground metallization on a PCB board acting as a reflector to increase its radiation efficiency and power gain by 37.3% and 9.8 dB, respectively, while decreasing the silicon area up to 30% compared to the previous works. The antenna is directly matched to a two-stage low noise amplifier (LNA) in a synergetic way as to give rise to an active integrated antenna (AIA) in order to avoid additional matching or interconnect losses. The LNA is followed by a double-balanced folded Gilbert cell mixer, which produces a lower intermediate frequency (IF) such that no probing is required for measurements. The measured total gain of the AIA is 14 dBi. Its total core area is 0.83 mm 2 while the total chip area, including the pad frame, is 1.55 × 0.85 mm 2 .INDEX TERMS 5G, mm-wave, nanometer-scale CMOS, 28 nm CMOS, active integrated antenna (AIA), antenna-on-chip (AoC), RF front-end, low noise amplifier (LNA), folded Gilbert cell mixer, on-chip transformer.