Chemical mechanical polishing (CMP) is a common method for planarization/polishing materials during integrated circuits (IC) fabrication. Pad conditioning is a critical component of a CMP process. Herein, the impact of surface textures created by different types of pad conditioners (PC) such as coarse, mid-coarse, and fine PC on the solid pads are studied. Additional surface texture parameters such as surface height distribution, skewness, Dale Void Volume are used to determine an optimum surface texture that gives desired CMP performance such as material removal rate and within-wafer non-uniformity. It was determined that an optimum surface texture on a solid CMP pad can be obtained with a mid-coarse disk. It is further demonstrated that by the addition of porosity to the pads, it is possible to recreate an optimum surface texture and desired CMP performance, similar to that obtained with a mid-coarse disk and a solid pad. Tribological mechanisms of the different pad and PC combinations are presented using the coefficient of friction. It is concluded that porous pad and fine PC pairing can tackle the issues of slurry transport limitations, lack of asperity contact, and process stability over pad life.

It is well known that chemical mechanical polishing (CMP) pads play a dominant role in the overall performance of the polishing process. It is critical to have a fundamental understanding of the impact of the change in the pad mechanical properties on the CMP performance. The stabilization of material removal rates and planarization efficiency (PE) are demonstrated by modification of pad mechanical properties such as storage modulus. For all the pads, removal rate and PE values are compared between wafers polished for a longer time (90 seconds) versus shorter time (15 seconds). It is concluded that for longer polish time, higher removal rate and lower PE results from a drop in the storage modulus. This decrease in the storage modulus is a consequence of an increase in the polish temperature with time. Results indicate that by minimizing the change in storage modulus with temperature, the impact of longer polish time on CMP performance can be minimized.

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Shallow trench isolation (STI) chemical mechanical planarization (CMP) will continue to be a critical step in the device fabrication of future technology nodes. A CMP process needs the right combination of pad, slurry, and pad conditioner to be able to deliver the best performance. Engineered pad surface along with usage of non-Prestonian ceria slurries can be used to solve key STI CMP challenges. Herein, it is demonstrated that relative to a reference pad, reducing and optimizing pad surface roughness, can help improve material removal rate by 26%-95% at different wafer pressures, lower the dishing by 34%-51% for feature size of 50-200 μm, thereby leading to an improved planarization performance. This work illustrates that the surface texture of a pad can be used to achieve a stable dishing range over different feature scales for various over polish times. Also, optimizing the pad surface roughness minimizes slurry consumption by 33% and enables polishing at a lower downforce. Further, it is demonstrated that relative to a reference pad, defectivity can be improved up to 85% for the pad without impacting the planarization performance by reducing the pad material hardness and polishing at an optimized pad surface roughness.

Pad conditioning (PC) is one of the key aspects of a chemical mechanical polishing (CMP) process. PC is known to impact the material removal rates (MRR), within-wafer non-uniformity (WIWNU) of material removal rates, planarization, defects, and the overall cost of ownership of the CMP process. Herein, changes in the aggressiveness of a pad conditioning disk with usage and exposure to the slurry are determined using the novel high-performance pad conditioning (HPPC) arm. The changes in the PC sweep torque was correlated to the change in the aggressiveness of the PC disk with usage. Thereafter, the rate of drop in the PC torque was used to characterize a PC disk into different regimes such as stable and unstable regimes. The stable regime of a PC disk is defined as the one in which the rate of drop in the PC sweep torque i.e. change in the disk aggressiveness with usage is not significant. Further, it is demonstrated that it is possible to maintain stable MRR, WIWNU over a large number of wafers by using a PC disk in its stable regime, which in turn augments the stability of a CMP process.