In medicine, particularly in radiology, there are great expectations in artificial intelligence (AI), which can “see” more than human radiologists in regard to, for example, tumor size, shape, morphology, texture and kinetics — thus enabling better care by earlier detection or more precise reports. Another point is that AI can handle large data sets in high-dimensional spaces. But it should not be forgotten that AI is only as good as the training samples available, which should ideally be numerous enough to cover all variants. On the other hand, the main feature of human intelligence is content knowledge and the ability to find near-optimal solutions. The purpose of this paper is to review the current complexity of radiology working places, to describe their advantages and shortcomings. Further, we give an AI overview of the different types and features as used so far. We also touch on the differences between AI and human intelligence in problem-solving. We present a new AI type, labeled “explainable AI,” which should enable a balance/cooperation between AI and human intelligence — thus bringing both worlds in compliance with legal requirements. For support of (pediatric) radiologists, we propose the creation of an AI assistant that augments radiologists and keeps their brain free for generic tasks.

PurposeEmbedded technologies are one of the fastest growing sectors in information technology today and they are still open fields with many business opportunities. Hardly any new product reaches the market without embedded systems components any more. However, the main technical challenges include the design and integration, as well as providing the necessary degree of security in an embedded system. This paper aims to focus on a new processor architecture introduced to face security issues.Design/methodology/approachIn the short term, the main idea of this paper focuses on the implementation of a method for the improvement of code security through measurements in hardware that can be transparent to software developers. It was decided to develop a processor core extension that provides an improved capability against software vulnerabilities and improves the security of target systems passively. The architecture directly executes bound checking in hardware without performance loss, whereas checking in software would make any application intolerably slow.FindingsSimulation results demonstrated that the proposed design offers a higher performance and security, when compared with other solutions. For the implementation of the Secure CPU, the SPARC V8‐based LEON 2 processor from Gaisler Research was used. The processor core was adapted and finally synthesised for a GR‐XC3S‐1500 board and extended.Originality/valueAs numerically, most systems run on dedicated hardware and not on high‐performance general purpose processors. There certainly exists a market even for new hardware to be used in real applications. Thus, the experience from the related project work can lead to valuable and marketable results for businesses and academics.

The research on security issues is getting more important, as the number of embedded and networked computing systems is constantly increasing. Due to strict restrictions and strong requirements, only special software applications can be used in security-critical embedded systems. So, it is necessary to secure those software applications with a special hardware implementation of a secure processor architecture.In this paper, we propose the architecture of the Secure CPU, including a memory structure using the SecureTag technique for marking memory lines. Our basic idea was to extend CPU registers by two replicas, which represent the lowest and highest value of a particular register. The advantages of this concept are minor changes in the architecture, the permanent and implicit checking of bounds, the secure storage of bounds in the memory and the high compatibility to several software applications. We verified our concept with an adapted processor simulator and describe its adaptations.

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