This paper describes a metal oxide patternable hardmask designed for EUV lithography. The material has imaged 15-nm half-pitch by projection EUV exposure on the SEMATECH Berkeley MET, and 12-nm half-pitch by electron beam exposure. The platform is highly absorbing (16 µm -1 ) and etch resistant (>100:1 for silicon). These properties enable resist film thickness to be reduced to 20nm, thereby reducing aspect ratio and susceptibility to pattern collapse. New materials and processes show a path to improved photospeed. This paper also presents data for on coating uniformity, metal-impurity content, outgassing, pattern transfer, and resist strip.

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Defectivity has been one of the largest unknowns in immersion lithography. It is critical to understand if there are any immersion specific defect modes, and if so, what their underlying mechanisms are. Through this understanding, any identified defect modes can be reduced or eliminated to help advance immersion lithography to high yield manufacturing. Since February 2005, an ASML XT:1250Di immersion scanner has been operational at IMEC. A joint program was established to understand immersion defectivity by bringing together expertise from IMEC, ASML, resist vendors, IC manufactures, TEL, and KLA-Tencor. This paper will cover the results from these efforts.The new immersion specific defect modes that will be discussed are air bubbles in the immersion fluid, water marks, wafer edge film peeling, and particle transport. As part of the effort to understand the parameters that drive these defects, IMEC has also developed novel techniques for characterizing resist leaching and water uptake. The findings of our investigations into each immersion specific defect mechanism and their influencing factors will be given in this paper, and an attempt will be made to provide recommendations for a process space to operate in to limit these defects.