is an order magnitude larger than previously thought, yet near the low end of known solidsolid interfaces. Our study also reveals unexpected insight into non-uniformities of the MoS2 transistors (small bilayer regions), which do not cause significant self-heating, suggesting that such semiconductors are less sensitive to inhomogeneity than expected. These results provide key insights into energy dissipation of 2D semiconductors and pave the way for the future design of energy-efficient 2D electronics. Keywords: Energy dissipation, 2D semiconductors, thermal boundary conductance, Raman thermometry, MoS2 2The performance of nanoelectronics is most often constrained by thermal challenges, 1, 2 memory bottlenecks, 3 and nanoscale contacts. 4 The former have become particular acute, with high integration densities leading to high power density, and numerous interfaces (e.g. between silicon, copper, SiO2) leading to high thermal resistance. New applications and new form-factors call for dense vertical integration into multi-layer "high-rise" processors for high-performance computing, 3 or integration with poor thermal substrates like flexible plastics (of thermal conductivity 5xlower than SiO2 and nearly 500x lower than silicon) for wearable computing. 5 These are the two most likely platforms for incorporating 2D semiconductors into electronics, yet very little is known about fundamental limits or practical implications of energy dissipation in these contexts.At its most basic level, energy dissipation begins in the ultra-thin transistor channel and is immediately limited by the insulating regions and thermal resistance with the interfaces surrounding it. Herbert Kroemer's observation 6 that "the interface is the device" is remarkably aptfor 2D semiconductors such as monolayer MoS2. These have no bulk, and are thus strongly limited by their interfaces. For instance, even some of the best electrical contacts known today add >50% parasitic resistance to MoS2 transistors when these are scaled to sub-100 nm dimensions. Similarly, thermal interfaces may be expected to limit energy dissipation from 2D electronics, and their understanding is essential. Nevertheless, a key challenge is the need to differentiate heating of the sub-nanometer thin 2D material from its environment. Here, Raman spectroscopy holds a unique advantage, 8, 9 as the temperature of even a monolayer semiconductor can be distinguished from the material directly under (or above) it, if the Raman signatures are distinct. 10Figure 1a shows our typical device structure and measurement setup. We utilize high-qual- Minor, randomly distributed non-uniformities in the temperature seen in Figure 2 are within the uncertainty of the measurement and are also visible in the reference map taken at VDS = 0 (on a hot stage), for which the temperature is known to be uniform, as shown in Supporting Information Figure S4. The uniform self-heating of transistors from CVD-grown MoS2 suggests that any change in energy dissipation around the 2L spots or other non-uniformit...

Despite much interest in applications of two-dimensional (2D) fabrics such as MoS, to date most studies have focused on single or few devices. Here we examine the variability of hundreds of transistors from monolayer MoS synthesized by chemical vapor deposition. Ultraclean fabrication yields low surface roughness of ∼3 Å and surprisingly low variability of key device parameters, considering the atomically thin nature of the material. Threshold voltage variation and very low hysteresis suggest variations in charge density and traps as low as ∼10 cm. Three extraction methods (field-effect, Y-function, and effective mobility) independently reveal mobility from 30 to 45 cm/V/s (10th to 90th percentile; highest value ∼48 cm/V/s) across areas >1 cm. Electrical properties are remarkably immune to the presence of bilayer regions, which cause only small conduction band offsets (∼55 meV) measured by scanning Kelvin probe microscopy, an order of magnitude lower than energy variations in Si films of comparable thickness. Data are also used as inputs to Monte Carlo circuit simulations to understand the effects of material variability on circuit variation. These advances address key missing steps required to scale 2D semiconductors into functional systems.

Heterogeneous integration of nanomaterials has enabled advanced electronics and photonics applications. However, similar progress has been challenging for thermal applications, in part due to shorter wavelengths of heat carriers (phonons) compared to electrons and photons. Here, we demonstrate unusually high thermal isolation across ultrathin heterostructures, achieved by layering atomically thin two-dimensional (2D) materials. We realize artificial stacks of monolayer graphene, MoS2, and WSe2 with thermal resistance greater than 100 times thicker SiO2 and effective thermal conductivity lower than air at room temperature. Using Raman thermometry, we simultaneously identify the thermal resistance between any 2D monolayers in the stack. Ultrahigh thermal isolation is achieved through the mismatch in mass density and phonon density of states between the 2D layers. These thermal metamaterials are an example in the emerging field of phononics and could find applications where ultrathin thermal insulation is desired, in thermal energy harvesting, or for routing heat in ultracompact geometries.

As the size of materials, particles, and devices shrinks to nanometer, atomic, or even quantum scale, it is more challenging to characterize their thermal properties reliably. Scanning thermal microscopy (SThM) is an emerging method to obtain local thermal information by controlling and monitoring probe-sample thermal exchange processes. In this review, key experimental and theoretical components of the SThM system are discussed, including thermal probes and experimental methods, heat transfer mechanisms, calibration strategies, thermal exchange resistance, and effective heat transfer coefficients. Additionally, recent applications of SThM to novel materials and devices are reviewed, with emphasis on thermoelectric, biological, phase change, and 2D materials.

In this work, we measure the thermal and thermoelectric properties of large-area Si0.8Ge0.2 nano-meshed films fabricated by DC sputtering of Si0.8Ge0.2 on highly ordered porous alumina matrices. The Si0.8Ge0.2 film replicated the porous alumina structure resulting in nano-meshed films. Very good control of the nanomesh geometrical features (pore diameter, pitch, neck) was achieved through the alumina template, with pore diameters ranging from 294 ± 5nm down to 31 ± 4 nm. The method we developed is able to provide large areas of nano-meshes in a simple and reproducible way, being easily scalable for industrial applications. Most importantly, the thermal conductivity of the films was reduced as the diameter of the porous became smaller to values that varied from κ = 1.54 ± 0.27 W K−1m−1, down to the ultra-low κ = 0.55 ± 0.10 W K−1m−1 value. The latter is well below the amorphous limit, while the Seebeck coefficient and electrical conductivity of the material were retained. These properties, together with our large area fabrication approach, can provide an important route towards achieving high conversion efficiency, large area, and high scalable thermoelectric materials.