SUMMARYThe 'Quite universal circuit simulator ' (Qucs) is an open source circuit simulator supporting Verilog-A compact model standardization. This paper describes a number of compact semiconductor device and circuit macromodelling techniques that have been implemented in recent Qucs releases, stressing those techniques that are not found in SPICE 2g6 or 3f5. It also introduces a novel hierarchical approach to Verilog-A compact model and circuit macromodel construction based on non-linear equation-defined devices, linear-controlled sources and noise generators embedded in subcircuits. To illustrate the new approach, the properties and models of a number of components with electrical and non-electrical characteristics are described. These models demonstrate how recent trends in open source simulation technology use embedded equations as integral elements in component and physical process models.

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SUMMARYRecent trends in compact device modelling and circuit simulation suggest a growing movement towards standardization of Verilog-A as a vehicle for semiconductor device specification and model interchange among commercial and open source simulators. This paper introduces a nonlinear equation-defined device (EDD) characterized by current, voltage and charge equations with a similar syntax to Verilog-A. The EDD has been implemented in Qucs and used extensively as a central feature in an interactive modelling system that allows straightforward prototyping of compact device models prior to translation into Verilog-A. To illustrate the properties and the use of the Qucs EDD a number of examples centred on well-known SPICE models are described.

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