Cu and low-k dielectric based back-end-of-the-line (BEOL) interconnects is indispensable in advanced CMOS technologies for its significant improvement of chip resistance-capacitance (RC) delay. In this paper, we investigate the effects of dry etch process on the reliability of copper interconnects such as electromigration (EM), time dependent dielectric breakdown (TDDB) and stress migration (SM). Both the via height of its vertical part and the bevel profile of via isolation in dual damascene (DD) structure are detected to remarkably impact the final EM performance. Main contributors for TDDB include the low-k sidewall damage from ash, the interface necking right after the diluted HF (DHF) wet owing to insufficient sidewall passivation and the bowling profile from non-optimized integration process. EM enhancement related profiles are usually associated with smaller line top critical dimension (CD). This might degrade TDDB performance. We proposed the optimized etch method to address this trade-off issue. SM performance is normally defined by the mechanical and thermal properties of copper interface in DD structure. It can also be improved in etch process by post etch scheme such as N2/H2 treatment from the point view of polymer residue removal and copper interface repair.

In this work, CD (critical dimension) etching bias loading performance between dense and isolated (ISO) line was systematically investigated on Metal Hard Mask (M-HM) etch process in the scope of chemical gas, source power, pressure, bias power, and ESC temperature. Particularly, a CH4 based plasma curing upon photo resist mask was found with special capability to control the dense & ISO CD loading while keeping an on-target dense CD if it was properly applied. Furthermore, the remarkable impact of etch chemical gas on CD loading was also noticed between Cl2-based and HBr-based BARC open step. Besides, the stress and post-etch profile of M-HM were also found impacting CD loading performance. Based on these findings, a solution was successfully demonstrated on a case of electrical interconnection improvement between tungsten contact and copper trench.

Metal hard-mask based all-in-one etch scheme has been extensively integrated with Cu interconnects for its significant improvement in terms of the line sidewall roughness, the reduction of ultra low-k material damage and the enhancement of lithography process window. In this paper, we investigated the trade-off relationship between electromigration (EM) and timedependence break-down (TDDB) on one AMEC (Advanced Micro-fabrication Equipment Company) test vehicle. This etcher features the special switchable rf-power at bottom electrode. Results indicate the dynamic ESC (electrostatic chuck) is imperative to meet the quite different temperature demands between via etch and trench etch step, thus reducing the via encroachment on metal hard-mask while no metallic residue is detected at trench bottom. Meanwhile, the tunable edge ring coupled with the optimization of trench etch gases are also critical to deliver the on-target Rc and reliability performance. In brief, we successfully demonstrated the partial SAV (self-aligned via) could deliver the on-target WAT and reliability performance on AD-RIE.

Due to the inherent limitation from overlay shift control, the punch-through scheme coupled with via CD shrink and the definition optimization of metal hard-mask open was proven to be the current-best choice and only feasible way for the enhancement of TDDB performance and gap-fill window of metal hard-mask based ultra low-k dielectric interconnects. The disadvantages of metal hard-mask based all-in-one etch include the potential defect from TixFy and the early copper exposure before liner removal step. The copper exposure time during all-in-one etch needs well controlled to avoid the via/trench bottom roughness and the inter-layer VBD. Stress migration (SM) also attracts special attention in metal hard-mask based process and its performance can be improved from the point of view of WET clean and post etch treatment (PET). RC (resistance/capacitance) curve can be also improved to target by means of PET.

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