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We report for the first time, the effect of Stress Memorization Technique (SMT) for pMOSFET in our developed Dopant Confinement Layer (DCL). We successfully improved the short channel effect with keeping a high drive current. DCL technique dose not affect halo, extension and source/drain (S/D) profiles. The higher dopant concentration in DCL resulted in both the better hole mobility and the thinner equivalent oxide thickness of inversion layer capacitance (T eff ). Consequently, the highest drive current of 1004 A/ m was obtained / I off =161 nA/ m at |V dd |=1.0 V for 37 nm gate length pMOSFET.