We present a 64-channel 1-bit/2-level cross-correlation system for a passive millimeter wave imager used for indoor human body security screening. Sixty-four commercial comparators are used to perform 1-bit analog-to-digital conversion, and a Field Programmable Gate Array (FPGA) is used to perform the cross-correlation processing. This system can handle 2016 cross-correlations at the sample frequency of 1GHz, and its power consumption is 48.75 W. The data readout interface makes it possible to read earlier data while simultaneously performing the next correlation when imaging at video rate. The longest integration time is up to 68.7 s, which can satisfy the requirements of video rate imaging and system calibration. The measured crosstalk between neighboring channels is less than 0.068%, and the stability is longer than 10 s. A correlation efficiency greater than 96% is achieved for input signal levels greater than −25 dBm.

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Interferometric aperture synthesis is a proven technique in radio astronomy and earth remote sensing, which also shows great potentials in security screening. An aperture synthesis passive millimeterwave (PMMW) imager is under development at Beihang University, which is designed for concealed contraband detection on the human body in an indoor environment. This imager uses 256 antenna-receiver channels with 1 GHz bandwidth and can obtain a radiometric sensitivity less than 1 K at a video imaging rate (∼25 frame/s). One of the greatest challenges in this system is the development of a digital correlation subsystem capable of analog-to-digital (A/D) conversion and subsequent signal processing among the system's 256 channels. In this paper, a comparator-based 1-bit/2-level (1B/2L) A/D conversion architecture is presented. The main error sources during sampling are identified as the timing error of sampling clocks and threshold offset of comparators and analyzed in detail. The sampled data are captured by field programmable gate arrays (FPGAs) to perform further signal processing, and a data capture module performing the serialto-parallel conversion and per-bit deskew is designed in the FPGA to transfer sampled data from the sampling clock domain to the internal processing clock domain. A 64-channel test system is built to verify the design, and a correlation efficiency of 92.5% to 99.6% is observed at 1 GHz sampling frequency. It is found that the correlation efficiency degradation to less than 98% is caused by the threshold offsets of comparators which can be compensated using a digital-to-analog converter (DAC) or programmable potentiometer.INDEX TERMS Interferometry, aperture synthesis, 1-bit, analog-digital conversion, comparator, FPGA.

Digital cross-correlation is central to many applications including but not limited to Digital Image Processing, Satellite Navigation and Remote Sensing. With recent advancements in digital technology, the computational demands of such applications have increased enormously. In this paper we are presenting a high throughput digital cross correlator, capable of processing 1-bit digitized stream, at the rate of up to 2 GHz, simultaneously on 64 channels i.e., approximately 4 Trillion correlation and accumulation operations per second. In order to achieve higher throughput, we have focused on frequency based partitioning of our design and tried to minimize and localize high frequency operations. This correlator is designed for a Passive Millimeter Wave Imager intended for the detection of contraband items concealed on human body. The goals are to increase the system bandwidth, achieve video rate imaging, improve sensitivity and reduce the size. Design methodology is detailed in subsequent sections, elaborating the techniques enabling high throughput. The design is verified for Xilinx Kintex UltraScale device in simulation and the implementation results are given in terms of device utilization and power consumption estimates. Our results show considerable improvements in throughput as compared to our baseline design, while the correlator successfully meets the functional requirements.