A system approach for a power-scalable analog baseband (ABB) design is presented in this paper. Using this approach, the energy efficiency of an ABB can be maximized without compromising any other important specifications. To fulfill the feasibility study, a switchable-order gm-C lowpass filter (LPF) along with a voltage-controlled programmable-gain amplifier (VC-PGA) are designed. The selectivity of the LPF can be linearly scaled with power consumption. In addition, the power consumption of the VC-PGA has a binary-weighted manner. In contrast to conventional PGAs, the gain step of the designed PGA can be continuously tuned by a control voltage. To prove the concept, the ABB is implemented in 65 nm CMOS technology. The measurements show that the frequency responses of the ABB can be configured as either 5 th or 7 th order with 16 gain steps. The bandwidth is approximately 50 MHz for all cases and the gain step can be continuously tuned between 0 and 3 dB. At the high-gain mode, the output 3 rd-order intercept point (OIP3) and the input-referred noise (IRN) of the LPF and PGA are approximately to be 8 dBm and 5 nV/sqrt Hz, respectively. The maximum power consumption of the ABB, excluding the output buffer, is approximately 19.8 mW with a 1.2 V supply voltage. The die area, excluding the pads, is only 0.18 mm 2 .

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