In this paper we propose low power and high speed D-latch circuits, base on carbon nanotube field effect transistor. Dlatches are the important state-holding elements and systems performance enhancement will be achieved by improving the flip-flop latches structure. The circuit designs are simulated by HSPICE .In this paper the consumption result of the circuit parameters such as delay, power and PDP for our three different D-latch circuit design in various voltages and different temperatures.
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