In this study, a novel flower pollination algorithm (FPA) has been suggested for optimal tuning of P and PI controllers included in a variable speed drive VSD system control circuit. In addition to the manual tuning of controllers’ parameters, several optimization algorithms like GA, PSO, GWO have been used for controllers optimal tuning in different studies. In this study, the errors caused by grid side current harmonic distortion in the VSD system have been used depending on SPWM technique to generate switching signals for a four-quadrant chopper circuit that acts like a filter and compensates the harmonic content in the grid current and smooth ripples in both DC-link current and voltage. The studied drive system and control circuit have been modeled using Matlab/Simulink, then it was linked with the proposed algorithm and tested under different operation conditions. A hardware laboratory model has been built and tested in order to confirm the validity of this study. Comparing the proposed algorithm with other optimization algorithms shows that the suggested algorithm outperforms other algorithms in improving the time response of the VSD system, reducing total harmonic distortion THD of grid current, and reducing ripple factor PF.

This paper presents the reconfiguration of control circuit designed to control four-quadrant chopper placed in the variable speed drive system (VSDS)'s DC-link. The purpose of this design is to reduce the overall total harmonic distortion THD% of input current, and the ripple factor (RF) of the DC-link current in this system. Both of Grey Wolf Algorithm (GWO) & Particle Swarm Optimization (PSO) have been used to get the optimal parameters of proportional integral PI and proportional integral differential with filter PIDN controllers. The variable speed drive system and the proposed filter have been modeled in integration with the suggested algorithms to determine the optimal values of the controllers' parameters. The grey wolf algorithm GWO outperformed the PSO algorithm in term of reaching the optimum parameters in less number of iterations in both dynamic and static work conditions. Also, the time response of the system with GWO is better than with PSO.

This research introduces a filtering circuit design integrated with the DC-link of a medium power variable speed drive (VSD) system. The designed filtering circuit employs modern power electronic circuits to improve time response characteristics in both grid and dc-link sides. Depending on the widely used multi-level converters, a conventional three-level H-bridge four-quadrant chopper scheme was developed into a cascade five-level H-bridge four-quadrant chopper scheme. The time response of the proposed system was performed with both choppers, and results showed that voltage drop on cascade chopper transistors was reduced to half in comparison with voltage drop on conventional four-quadrant chopper transistors. Moreover, the sharp fluctuations in system's waves were mitigated; consequently, time response characteristics in both steady and transient states were remarkably improved. The total harmonic distortion factor THD% of the input current and voltage was reduced to 26.2% and 2.43% respectively and the ripple factor RF for DC-link current was reduced to 0.196.

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