Resistive random-access memory (RRAM) devices are very versatile with applications ranging from digital nonvolatile memories to analog synapses and integrate-fire neurons. Recently, RRAM based stochastic neurons have also been proposed for optimization networks that solve NP-hard problems. These applications rely on reliably writing a given conductance state repeatedly. A Pr1–x Ca x MnO3 (PCMO) based RRAM device is a nonfilamentary, bulk switching RRAM which demonstrates low device-to-device variations compared to filamentary RRAMs. However, a low complexity programming scheme to demonstrate low cycle-to-cycle variations (C2CV) as well is needed. In this work, we propose a one-shot Set (initialize) and Reset (program) scheme to experimentally demonstrate low C2CV (<15%) for multiple devices. Compared to one-shot programming on a filamentary device, there is a 2–4× increment in the number of levels that can be stored per device using PCMO RRAM. Further, one-shot programming in PCMO RRAM leads to a 35× (10×) reduction in the number of pulses for 3 (2) bits per device, respectively. This greatly simplifies the memory controller design for these devices compared to any iterative write-verify schemes. This scheme gives a further insight into the self-heating limited Set operation controlled by a series resistor while reinforcing the analog and precise nature of the Reset operation. We studied the impact of the C2CV in programming RRAM-based stochastic neurons on the Max-Cut optimization problem using Boltzmann machines. PCMO RRAM combined with the one-shot programming scheme emerges as the clear choice for a well-controlled RRAM device with minimal peripheral complexity.

Spiking neural networks (SNNs) are gaining widespread momentum in the field of neuromorphic computing. These network systems integrated with neurons and synapses provide computational efficiency by mimicking the human brain. It is desired to incorporate the biological neuronal dynamics, including complex spiking patterns which represent diverse brain activities within the neural networks. Earlier hardware realization of neurons was (a) area intensive because of large capacitors in the circuit design, (b) neuronal spiking patterns were demonstrated with clocked neurons at the device level. To achieve more realistic biological neuron spiking behavior, emerging memristive devices are considered promising alternatives. In this paper, we propose, PrMnO3 (PMO)-resistive random-access memory (RRAM) device-based neuron. The voltage-controlled electrothermal timescales of the compact PMO RRAM device replace the electrical timescales of charging a large capacitor. The electrothermal timescale is used to implement an integration block with multiple voltage-controlled timescales coupled with a refractory block to generate biological neuronal dynamics. Here, first, a Verilog-A implementation of the thermal device model is demonstrated, which captures the current-temperature dynamics of the PMO device. Second, a driving circuitry is designed to mimic different spiking patterns of cortical neurons, including intrinsic bursting and chattering. Third, a neuron circuit model is simulated, which includes the PMO RRAM device model and the driving circuitry to demonstrate the asynchronous neuron behavior. Finally, a hardware-software hybrid analysis is done in which the PMO RRAM device is experimentally characterized to mimic neuron spiking dynamics. The work presents a realizable and more biologically comparable hardware-efficient solution for large-scale SNNs.

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