Brain cancer is one of the cell synthesis diseases. Brain cancer cells are analyzed for patient diagnosis. Due to this composite cell, the conceptual classifications differ from each and every brain cancer investigation. In the gene test, patient prognosis is identified based on individual biocell appearance. Classification of advanced artificial neural network subtypes attains improved performance compared to previous enhanced artificial neural network (EANN) biocell subtype investigation. In this research, the proposed features are selected based on improved gene expression programming (IGEP) with modified brute force algorithm. Then, the maximum and minimum term survivals are classified by using PCA with enhanced artificial neural network (EANN). In this, the improved gene expression programming (IGEP) effectual features are selected by using remainder performance to improve the prognosis efficiency. This system is estimated by using the Cancer Genome Atlas (CGA) dataset. Simulation outputs present improved gene expression programming (IGEP) with modified brute force algorithm which achieves accurate efficiency of 96.37%, specificity of 96.37%, sensitivity of 98.37%, precision of 78.78%, F -measure of 80.22%, and recall of 64.29% when compared to generalized regression neural network (GRNN), improved extreme learning machine (IELM) with minimum redundancy maximum relevance (MRMR) method, and support vector machine (SVM).

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Barrel shifter architecture is well known for bit manipulation in a single clock cycle. Due to its various operations and advantages, it is most likely used in the Arithmetic logic unit of every processor. Gray code is also known as reflective code which is widely used in digital communication for the purpose of error correction and error detection. In this project, an 8 x 4 barrel shifter is designed which is further connected to 4-bit binary to gray code converter. The barrel shifter is cascaded with binary to gray code converter so that this combination can be useful for the application of encryption of binary data in digital communications. It is designed in cadence virtuoso tool using FinFET technology at 18 nm node. The simulation results proves that the power consumed by the proposed design with FinFET technology is 11.92% less when compared with the conventional design with MOS transistors. Hence, this design can be used in application of low power digital communications. The functionality testing and verification is done using cadence virtuoso tool.

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