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In this paper P novel approach for injecting Single Event Upsets, (SEU), by means of direct memory access, (DMA), mechanisms is presented. The oyrtem consists in a PC based control unit that generates DMA requests randomly in time to a board containing the processor under test, and a test unit. Experimentation performed on a digital signal processor intended to be used in B satellite project illustrates the potentialities ofthe proposed approach. h d r r rerms-single Eveni Upsets, SEU injection, SEU test, SEU tolerance.