In nearly all soldering processes, it is the intermetallic (IMC) layer that bonds the solder to the base metal. Thus, the IMC layer is necessary for any successful soldering operation used in the electronic industry. That is, a solder joint always has at least one IMC layer. While the IMC layer is needed, it is not static. It grows in subsequent reflows and during aging with time. Its growth without control could have adverse effect on the reliability. This is particularly true for flip-chip solder joints. The IMC, while necessary, seems to have also brought some problems. Thus, many packaging and solder experts believe that "the intermetallics are brittle and they can often embrittle the solder joints". On the other hand, not one really presents quantitative analysis to illustrate that the IMC is indeed brittle. No one really interprets what it means by "brittle." In this paper, we collect and review the physical properties of four commonly seen intermetallics: Cu6Sn5, Cu3Sn, Ni3Sn4, and AuSn4. These properties are compared with that of reference materials Cu and Sn3.5Ag solder. Based on the measured properties available, we analyze and evaluate whether these IMCs are indeed brittle. Based on the fracture of flip chip solder joints reported by others, we assess whether the fracture is caused by the "brittle" nature of the intermetallic as many believe or by something else.

A new fluxless hermetic sealing technique using electroplated Sn-rich soft solder is reported. Specific glass (SCG72) is chosen as lid material to seal alumina packages. It has nominal coefficient of thermal expansion of 7 ppm/ C, close to that of alumina. Alternatively, sapphire can also be used as the lid material. A thick Sn layer is plated over the Cr/Au patterned glass wafer, followed immediately by thin Au layer. This outer Au layer prevents the inner Sn from oxidation. In bonding, the glass lid is placed over the package rim which has a metallization structure of W/Ni/Au. The fluxless sealing process is performed in vacuum (50 millitorrs) to suppress tin oxidation. Compared to bonding in air, the oxygen content is reduced by a factor of 15 200. Fluxless bonding is valuable in many hermetic sealing applications such as microelectromechanical systems (MEMS), sensors, photonic devices, and imaging devices. Nearly void-free sealed joints are achieved with Sn-rich composition. Helium leakage tests are performed to evaluate hermetic quality. Scanning electron microscope (SEM) with energy dispersive X-ray spectroscopy (EDX) is used to evaluate the composition and microstructure of the sealing joints. The results show how the Sn-rich solder reacts with the W/Ni/Au on the package. This new sealing process can be applied to nearly all devices and packages that require hermetic sealing.

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Ag-copper dual-layer substrate design is presented. The Ag cladding on the copper substrate is a buffer to deal with the large mismatch in coefficient of thermal expansion (CTE) between semiconductors such as Si (3 ppm/ C) and Cu (17 ppm/ C). Ag is chosen because of its low yield strength, only one-tenth of that of Cu and one-third of the popular Sn3.5Ag solder. Other advantages are high electrical conductivity and high thermal conductivity. To bond Si chips to the Ag layer on copper substrates, Sn-rich solder is used. A fluxless bonding process is designed and developed. The bonding media are Ni/Sn/Au multilayer solder structure plated over Ag. In this design, Ni is a diffusion barrier between Sn and Ag. The thin (100 nm) outer Au layer prevents inner Sn from oxidation. The Si chip is deposited with Cr/Au under bump metallurgy (UBM). The bonding process is performed in 50-mtorr vacuum atmosphere without any flux. Comparing to bonding in air, the oxygen content is reduced by a factor of 15 200. The resulting joints consist of three distinct layers, i.e., Sn-rich layer, Ni 3 Sn 4 intermetallic compound, and Ni. Scanning acoustic microscopy (SAM) is used to verify the quality of the joint. Microstructure and composition of the joints are studied using scanning electron microscopy (SEM) with energy dispersive X-ray spectroscopy (EDX). This technique presents an initial success in overcoming the very large mismatch in thermal expansion between silicon and copper. It can be applied to mounting numerous high-power silicon devices to Cu substrate for various applications such as hybrid automotive and high-voltage power networks.