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This paper shows how real-time simulator of moving pictures compression algorithms can be rapidly assembled using a basic building block> here called MOVIE (Module for VIdeo Experimentation). The internal architecture of the MOVIE VLSI chip can be compared to a small systolic machine made of a %%bit I / O processor, a reduced linear array of 16-bit computation processors and data video input/output mechanisms. Externally, the chip is provided with four 16-bit bidirectional data ports and three 16-bit bidirectional data video port. Several MOVIE chips can be easily clustered to allow the size of the linear array of computation processors to be increased. The MOVIE chip is fully programmable in a high level language in order to make program developments easier.1063-6862/95 $4.00 0 1995 IEEE 193

The goal of the movie very large-scale integration chip is to facilitate the development of software-only solutions for real-time video processing applications. This chip can be seen as a building block for single-instruction, multiple-data processing, and its architecture has been designed so as to facilitate high-level language programming. The basic architecture building block associates a subarray of computation processors with an I/O processor. A module can be seen as a small linear, systolic-like array of processing elements, connected at each end to the I/O processor. The module can communicate with its two nearest neighbors via two communication ports. The chip architecture also includes three 16-bit video ports. One important aspect in the programming environment is the C-stolic programming language. C-stolic is a C-like language augmented with parallel constructs, which allow the differentiation between the array controller variables (scalar variables) and the local variables in the array structure (systolic variables). A statement operating on systolic variables implies a simultaneous execution on all the cells of the structure. Implementation examples of movie-based architectures dealing with video compression algorithms are given.Index Terms-Code generation, single-instruction, multipledata (SIMD) architecture, systolic architecture, very large-scale integration (VLSI) circuit, video compression, video processing.

The goal of the MOVIE VL5I chip is to facilitate the development of software-only solutions for real time video processing applications. This chip can be seen as a building block for SIMD arrays of processing elements and its architecture has been designed so as to facilitate high level language programming. The basic architecture building block associates a sub-array of computation processors with a I/o processor. A module can be seen as a small linear, systolic-like array of processing elements, connected at each end to the I/O processor. The module can communicate with its two nearest neighbours via two communication ports. The chip architecture also includes three 16-bit video ports. One important aspect in the programming environment is the C-stolic programming language. C-stolic is a C-like language augmented with parallel constructs which allow to differentiate between the array controller variables (scalar variables) and the local variables in the array structure (systolic variables). A statement operating on systolic variables implies a simultaneous execution on all the cells of the structure. Implementation examples of MOVIE-based architectures dealing with video compression algorithms are given.