Currently, most of the electrical tomography measurement systems were developed on the micro-controller unit, digital signal processor, or field programmable gate arrays (FPGAs), while the image reconstruction and display functions are implemented in a seperate host computer. Therefore, the complete hardware usually consist of a measurement system and image reconstruction computer. It is a trend to develop industrial standard electrical tomography system, which could implement the image reconstruction and measurement functions into an integrated processor/chip. However, most of the above mentioned processors could not provide the necessary computational resources as required by the computational intensive image reconstruction function. This paper describes a hardware scheme for implementing the image reconstruction functions on a heterogeneous hardware platform, in which the processor system (ARM) and programmable logics are tightly coupled and could achieve better resource utilization and overall system performance. By adopting high level synthesis (HLS) method, the image reconstruction algorithms could be realized jointly by the programmable logics and processor system. In this hardware scheme, the algorithms are properly optimized to achieve better data throughput and execution efficiency, i.e., by utilizing parallel computation in programmable logics. Details of the hardware scheme and method of accelerating the image reconstruction process are presented. Implementation results show that the proposed heterogeneous hardware scheme could achieve the image reconstruction rates of 24 and 1700 frames per second when employing the iterative and non-iterative algorithms, respectively.

Electrical impedance tomography (EIT) can be utilized to image the conductivity distribution of material under test. The EIT measurements depend on the quality in the current injection and voltage measuring circuits. The current source plays a vital role in the EIT instruments. In most of the research studies, the push–pull current sources were employed for the source and sink signal generation. It usually requires frequent calibration to achieve proper functioning, especially for the sweeping frequency measurements. In this paper, an alternative excitation method has been proposed for simplifying the design of the current source in EIT instruments, which aims to achieve the performance of the push–pull current source by using a single-ended current source. It could offer the following advantages: (1) hardware simplification and (2) reduced requirements on current source calibration. The corrected measurements could be consistent with that using push–pull excitation, as confirmed by the numerical simulations. In addition, the reconstructed images have also been investigated to illustrate the effectiveness of the proposed method.

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