Over the years, Steganography and Cryptography have been complementary techniques for enforcing security of digital data. The need for the development of robust multi-layered schemes to counter the exponential grow in the power of computing devices that can compromise security is critical in the design and implementation of security systems. Therefore, we propose a new combined steganographic and cryptographic scheme using the operators of genetic algorithm (GA) such selection, crossover and mutation, and some properties of the residue number system (RNS) with an appropriate fusing technique in order to embed encrypted text within images. The proposed scheme was tested using MatLab R R2017b and a CORE TM i7 processor. Simulation results show that the proposed scheme can be deployed at one level with only the stego image containing the encrypted hidden message and at another level where the stego message is further encrypted. An analysis based on standard key metrics such as visual perception and statistical methods on steganalysis and cryptanalysis show that the proposed scheme is robust, is not complex with reduced runtime and will consume less power due to the use of residue numbers when compared to similar existing schemes.

Data Security is a major concern for both individuals and organisations that are engaged in one form of communication or the other, especially in the cyberspace as a result of the emergence of digital computing and communication. In this paper, we present a novel three-layered text encryption and decryption scheme that is capable of encrypting and decrypting any character or symbol using Genetic Algorithm (GA) and some inherent properties from the Residue Number System (RNS). Simulated results of the proposed scheme shows that it is chaotic by sense of sight, robust with a very wide key space composed at different stages of the scheme and has a good throughput rate as well as being able to encrypt both smaller and larger messages.

This paper proposes two efficient residue to binary converters on a new three-moduli set using the Chinese Remainder Theorem. The proposed reverse converters are adder based and memoryless. In comparison with other moduli sets with similar dynamic range, the new schemes out-perform the existing schemes in terms of both hardware cost and relative performance.

The possibility of errors being propagated during the encoding process of cryptographic and steganographic schemes is real due to the introduction of noise by ciphering the data from stage to stage. This real possibility therefore requires that an efficient scheme is proposed such that if after the decoding process the accurate information is not discovered, then it can be employed to detect and correct any errors in the system. The Residue Number System (RNS) by its nature is fault tolerant since an error in one digit position does not affect other digit positions; but the Redundant Residue Number System (RRNS) had been used over the years to effectively detect and correct errors. In this paper, we propose an efficient scheme that can detect and correct both single and multiple errors after and/or during computation and/or transmission provided the redundant moduli are sufficient enough. A theoretical analysis of the performance of the proposed scheme show it will be a better choice for detecting and correcting computational and transmission errors to existing similar state-of-the-art schemes.

In this paper, an efficient scheme for detecting and correcting overflow during addition in Residue Number System (RNS) is presented. The approach which is novel to the moduli set 2 − 1, 2 , 2 + 1 is based on the Chinese Remainder Theorem and demonstrates theoretically to be a very fast scheme compared to similar state of the art schemes. The proposed method is able to detect overflow in RNS addition without full reverse conversion; Additionally, the scheme also prevents the representation of wrong numbers as a result of overflow, thus the scheme gives the accurate result without errors whether overflow occurs or not. A comparison, which proves the efficiency of the proposed scheme, in terms of delay and area requirements is also presented.