AlScN/GaN heterostructures are worth investigating due to the remarkable high gradients in spontaneous polarization at their interfaces, which brings them into play for a wide field of potential high-power and high-frequency electronic applications. In this work, AlScN/GaN heterostructures for high electron mobility transistor (HEMT) structures were grown by metalorganic chemical vapor deposition. We have investigated the impact of growth parameters on thick AlScN layers and on thin AlScN/GaN heterostructures. Growth parameters, such as temperature, V/III ratio, pressure, and growth mode, were varied with the focus on surface morphology, crystal quality, and incorporation of impurities. High growth temperatures improve the surface quality and reduce impurities incorporation notably. In addition to that, a slight decrease in carbon concentration is obtained by adopting a pulsed supply of metalorganic precursors. V/III ratio and pressure did not influence the layer quality observably. Heterostructures with root mean square surface roughness values as low as 0.38 nm, revealing smooth growth steps, were achieved. The presence of two-dimensional electron gases with sheet carrier densities and mobilities of up to 2 × 1013 cm−2 and close to 900 cm2/(V s), respectively, resulted in channel sheet resistances as low as 337 Ω/sq, very suitable for AlScN/GaN HEMTs. Heterostructures with sheet resistances below 200 Ω/sq and sheet carrier densities of 5 × 1013 cm−2 were also achieved but showed significantly lower mobility.

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The ORCID identification number(s) for the author(s) of this article can be found under https://doi.org/10.1002/pssb.202100312.

GaN devices for high‐frequency and high‐power applications often need n‐doped GaN layers on top of their structures. Such layers can be either grown in an epitaxial reactor or formed by implantation or annealing of Si‐containing layers (e.g., a SiO2 mask). These processes are typically performed at high temperatures, which generate the undesired effect of atom diffusion between the different epitaxial layers; consequently, the electrical performance of the final device will be hampered. Herein, an optimized epitaxial growth process of n‐GaN layers is developed with the focus on minimizing the atom diffusion process, while preserving a high material quality and excellent electrical characteristics, such as very low contact resistance for n‐GaN ohmic contacts or high electron mobility in GaN npin structures. A low growth temperature process combined with improved growth conditions to minimize the incorporation of impurities is successfully optimized and demonstrated on different epitaxial reactors.

The current aperture vertical electron transistor (CAVET) combines the high carrier mobility of the AlGaN/GaN heterostructure with the better electric field distribution of the vertical topology, allowing for higher power densities if compared with lateral high electron mobility transistors (HEMTs). The formation of a current blocking layer (CBL), without degenerating the aperture region and the subsequently overgrown AlGaN/GaN heterostructure is the key building block of such devices. Herein, a comparison of GaN:Mg nonplanar selective area growth (SAG) and Mg‐ion implantation is carried out primarily focusing on structural evolution, Mg distribution, and 2D electron gas (2DEG) performance. The epitaxial growth process in SAG is correlated to local growth increase and ridge development, and then optimized regarding mesa filling. AlGaN/GaN regrowth is analyzed regarding structural evolution after overgrowth and Mg distribution into the GaN channel. Considerably lower Mg‐distribution into subsequently grown layers is detected for implanted samples in agreement with the electrical performance of the overgrown AlGaN/GaN heterostructures. A GaN‐on‐Si quasivertical CAVET structure with an Mg‐implanted CBL and 250 nm channel thickness is fabricated. High surface quality and proper 2DEG performance demonstrate the potential use of GaN‐on‐Si CAVET's using Mg implantation for CBL fabrication.