We report the design and implementation of an Analog-to-Information Converter (AIC) based on Compressed Sensing (CS). The system is realized in a CMOS 180 nm technology and targets the acquisition of bio-signals with Nyquist frequency up to 100 kHz. To maximize performance and reduce hardware complexity, we co-design hardware together with acquisition and reconstruction algorithms. The resulting AIC outperforms previously proposed solutions mainly thanks to two key features. First, we adopt a novel method to deal with saturations in the computation of CS measurements. This allows no loss in performance even when 60% of measurements saturate. Second, the system is able to adapt itself to the energy distribution of the input by exploiting the so-called rakeness to maximize the amount of information contained in the measurements. With this approach, the 16 measurement channels integrated into a single device are expected to allow the acquisition and the correct reconstruction of most biomedical signals. As a case study, measurements on real electrocardiograms (ECGs) and electromyograms (EMGs) show signals that these can be reconstructed without any noticeable degradation with a compression rate, respectively, of 8 and 10.
Resonant power converters represent a step further in the effort of increasing the operating frequency, and consequently the power density, with respect to conventional switching converter architectures. Nevertheless, resonant converters are used only in very specific applications. The main issue is their design that, being not based on a solid mathematical background, results in a non-trivial task. In this paper we present a prototype of a class-E resonant converter with a simplified architecture, allowing both a small size (and so a higher density) and a simple mathematical analysis. Conversely with respect to the state-of-the-art approach, the circuit design is obtained by means of a semi-analytic mathematical approach without any support from circuital simulation. Measurements confirm the performance expected according to the mathematical model, and prove that the design of circuits with the proposed architecture can be effectively achieved with the developed mathematical model
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