No abstract

The realization of capacitance multiplier using the versatile active building block, namely voltage differencing differential difference amplifier (VDDDA) is presented in this paper. The realized capacitance multiplier is very simple consisting of one VDDDA, one MOS resistor ([Formula: see text] and one grounded capacitor which is attractive for integration. The multiplication factor (KC) of the realized circuit can be electronically controlled via the bias current ([Formula: see text] and control voltage ([Formula: see text] without the need of any matching condition of active and passive element. Moreover, the multiplication factor can be adjusted to be more or less than one. The performances of the presented capacitance multiplier are verified through Pspice simulation using CMOS VDDDA in 0.18[Formula: see text][Formula: see text]m TSMC technology with [Formula: see text][Formula: see text]V power supplies. The multiplication factor is designed to be [Formula: see text] by choosing [Formula: see text][Formula: see text]V, [Formula: see text][Formula: see text][Formula: see text]A and [Formula: see text] pF. The simulated multiplication factor is around 1.98. The simulated operational frequency range is around three decades (6.16 kHz–8.91[Formula: see text]MHz). The performances of the proposed circuit are also verified by the experiment using VDDDA implemented from the commercial ICs, AD830 and LM13700 with [Formula: see text][Formula: see text]V power supplies. The experiment is conducted under the same multiplication factor ([Formula: see text]) as the simulation by choosing [Formula: see text] k[Formula: see text] (1% passive resistor), [Formula: see text][Formula: see text][Formula: see text]A and [Formula: see text][Formula: see text]nF. The experimental multiplication factor is around 2.06. The experimental operational frequency range is around three decades (1[Formula: see text]kHz–1.25[Formula: see text]MHz). By adjusting the bias current from 17.67[Formula: see text][Formula: see text]A to 400 [Formula: see text]A, the experimental multiplication factor is controllable from 11.47 to 0.48. The percent deviation of the theoretical and experimental multiplication factor is lower than 5% when the value of bias current is greater than 39[Formula: see text][Formula: see text]A. These deviations stem from the effect of the parasitic capacitance and resistance in VDDDA. Moreover, the application example of the presented capacitance multiplier as the sinusoidal oscillator is presented. The performances of the presented oscillator verified via the experiment are well consistent with theoretical anticipation.