Abstract. Given deterministic interfaces P and Q, we investigate the problem of synthesising an interface R such that P composed with R refines Q. We show that a solution exists iff P and Q ⊥ are compatible, and the most general solution is given by (P Q ⊥ ) ⊥, where P ⊥ is the interface P with inputs and outputs interchanged. Remarkably, the result holds both for asynchronous and synchronous interfaces. We model interfaces using the interface automata formalism of de Alfaro and Henzinger. For the synchronous case, we give a new definition of synchronous interface automata based on Mealy machines and show that the result holds for a weak form of nondeterminism, called observable nondeterminism. We also characterise solutions to the synthesis problem in terms of winning input strategies in the automaton (P ⊗ Q ⊥ ) ⊥ , and the most general solution in terms of the most permissive winning strategy. We apply the solution to the synthesis of converters for mismatched protocols in both the asynchronous and synchronous domains. For the asynchronous case, this leads to automatic synthesis of converters for incompatible network protocols. In the synchronous case, we obtain automatic converters for mismatched intellectual property blocks in system-onchip designs. The work reported here is based on earlier work on interface synthesis in [Bha05] for the asynchronous case, and [BR06] for the synchronous one.

The FlexRay protocol [4] is likely to be the de facto standard for automotive communication systems. Hence, there is a need to provide hard performance guarantees on properties like worst case response times of messages, their buffer requirements, end-to-end latency (for example, from sensor to actuator), etc., for FlexRay based systems. The paper [11] provides an analysis for finding worst case response times of the messages transmitted on the FlexRay bus, but the analysis is done using ILP formulation and is thus computationally expensive. The paper [5] models the FlexRay in the analytic framework of Real-Time Calculus [12,3] and is compositional as well as scalable. In this paper, we show that the analysis of [5] may lead to results that are over optimistic; in particular, we show that obtaining the "upper service curves" is not trivial and does not follow the reasoning of the "lower service curves" which the authors obtain. We also provide tighter "lower service curves" than that of [5]. Finally we show that our model allows the messages to be of variable size which is not the case with [5].

Abstract-The SPEEDS project is aimed at making rich components models (RCM) into a mature framework in all phases of the design of complex distributed embedded systems. The RCM model is required to be expressive enough to cover the entire development process from requirements to code through design, and also capture both functional and non-functional aspects. In this paper we propose a language-based framework for real-time component interfaces in SPEEDS that is suitable at the ECU layer when a target processor has been identified, and WCET analysis done. We assume a discrete time model.

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Ahstract-A notion of interfaces based on regular languagesfor modelling and verification of real-time scheduling constraints was proposed in [5]. This initial notion considers task sets running on single resources, and simple deadline requirements. We extend the approach to enable support for complex task models running on systems with multiple resources. We show that this extension preserves all properties of the original notion. In addition, this extension gives rise to the application of our interfaces in the design of more complex systems, where components can be spread over distributed architectures.The work is complemented by an initial implementation that performs scheduling analysis for a relevant class of real-time interfaces. It actually constructs an interface for a system model if it satisfies a set of given real-time requirements.