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Using FPGA to accelerate the application of convolutional neural networks has attracted more and more attention. However, the design technology of the FPGA accelerator cannot follow up the latest achievements of the convolutional neural networks, nor can it consider optimizing the complex network structure combined with the characteristics of hardware to improve the accuracy of the network and simplify the implementation of hardware. To address these issues, in this paper, we adopt the development idea of algorithm-hardware co-design, compress the structure and optimize the operator for a state-of-the-art lightweight person re-identification network, and design a new network model SGCNet (Shift Gaussian Convolution Network). Specifically, SGCNet is obtained by structure optimization and operator replacement according to the optimization degree of the operator in the FPGA hardware environment. For convolution operation, only 1 × 1 kernel convolution operator is adopted in SGCNet, while spatial convolution is replaced by a more effective shift operation. SGCNet is more concise and clear in the operation types and complex structure of the network. Experimental evaluations demonstrate that SGCNet’s top-5 accuracy of 92.7% on ImageNet and R1 accuracy of 74.6% on CUHK03 of person re-identification data set, is higher than CMSNet network.

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