Abstract. Electrical activity of grain boundaries (GB) in polycrystalline silicon films can stand duty as an additional factor of action on its properties. At present paper it has been studied polycrystalline silicon epitaxial films grown by CVD-method at low-resistivity n+-type poly-Si substrates. A p+-n junction of 0,5/zm deep was formed by ion implantation of boron. The effect of thermal annealing (TA) on I-V characteristics of the p+-n-n + structures was studied. It was founded that the region with negative resistivity is appeared in I-V characteristic after TA in vacuum at 800~ for 1 hour. Investigations by means of C-V and temperature characteristics of samples show that the S-image of the I-V characteristics is caused by phosphorus diffusion along GB that give rise to conduction of the charge carriers along GB. For the first time it was shown the opportunity of the creation of low-cost poly-Si S-diode by TA.

Annotation: The paper discusses perspectives of elaborating microelectronic and optoelectronic devices on polycrystalline silicon films. The I-V features of structures with p-n-junction, formed by using methods of р-type conductivity layer grow, thermal diffusion and ion-implantation of boron atoms into n-type polycrystalline silicon layer are compared. The I-V feature with S-form curve of the investigated structures conditioned by changing of the conductivities of base and grain boundaries under thermal processing are revealed.