A continuous SF 6 /O 2 plasma process at room temperature has been used to etch tapered through-silicon vias using a DRIE-ICP tool. These features (10-100 μm in diameter) are aimed for applications in 3D integration and MEMS packaging. The effects of various process parameters such as O 2 flow rate, platen bias, pressure and substrate temperature on the via profile (depth, slope angle and aspect ratio) development are investigated. The etching mechanism was also studied and x-ray photoelectron spectroscopy (XPS) analysis reveals a SiO x passivation layer of the order of ∼2 nm on the via sidewall and a substantial temperature dependence. Both tapering and anisotropy of etching depend on this passivation layer formation. Finally, suitable tapered vias with an aspect ratio of ∼5 and a slope angle of ∼83• are obtained by properly balancing the etching regimes. In this condition, a maximum etch rate of 7 μm min −1 is achieved.

In this paper, a self-aligned SiGe/Si HBT has been fabricated based on dry/wet etching, where Si and SiGe materials were etched by KOH (potassium hydroxide) solution and SF6(sulfur hexafluoride). It is a key technology to control the etch of ultra-thin Si and SiGe film. When N+/N silicon in emitter region is etched, the length of etch time is critical. Despite a small lateral etch, dry etching doesn't benefit the realization of self-alignment process, nor benefit improvement of yield and fmax. In this paper, based on the chemical properties of silicon and germanium, dry and wet etches were properly combined to etch silicon and silicon germanium. First, N+/N Si outside emitter was etched with intentional lateral etch using KOH solution. Then, SiGe was etched by SF6. Finally, SiGe HBT with self-alignment of emitter to base has been developed. The measured results are: cutoff frequency fT=103GHz, maximum oscillation frequency fmax=124GHz.