Amorphous hydrogenated silicon/crystalline silicon (a‐Si:H/c‐Si) heterojunction solar cells are investigated and optimized with regard to efficiency and simplicity of processing. Starting with a survey of a‐Si:H/c‐Si heterojunction solar cell results from the literature, we describe the fabrication steps of our a‐Si:H/c‐Si technology and analyze the electronic device properties by quantum efficiency, current–voltage, admittance, and capacitance–voltage measurements. The open‐circuit voltage and the fill factor of the a‐Si:H/c‐Si heterojunction solar cells under investigation are limited by recombination in the neutral zone of the crystalline Si absorber. Recombination at the a‐Si:H/c‐Si‐interface is subsidiary in respect of the limitation of the open‐circuit voltage. Our best n‐type a‐Si:H/p‐type c‐Si solar cell prepared without high‐efficiency features such as back‐surface field or surface texturing has an independently confirmed efficiency of 14.1% and an open‐circuit voltage of 655 mV. Copyright © 2001 John Wiley & Sons, Ltd.

This article investigates limitations to the open circuit voltage of n-type amorphous silicon/p-type crystalline silicon heterojunction solar cells. The analysis of quantum efficiency and temperature dependent current/voltage characteristics identifies the dominant recombination mechanism. Depending on the electronic quality of the crystalline silicon absorber, either recombination in the neutral bulk or recombination in the space charge region prevails; recombination at the heterointerface is not relevant. Although interface recombination does not limit the open circuit voltage, recombination of photogenerated charge carriers at the heterointerface or in the amorphous silicon emitter diminishes the short circuit current of the solar cells.

Thin film solar cells based on monocrystalline Si films are transferred to a glass superstrate. Chemical vapor deposition serves to epitaxially deposit Si on quasi-monocrystalline Si films obtained from thermal crystallization of a double layer porous Si film on a Si wafer. A separation layer that forms during this crystallization process allows one to separate the epitaxial layer on top of the quasi-monocrystalline film from the starting Si wafer. We presently achieve an independently confirmed solar cell conversion efficiency of 9:26%. Ray tracing studies in combination with electrical device simulation indicate an efficiency potential of around 17% using simple device processing and moderate assumptions on minority carrier lifetime and surface recombination

The current sensor portfolio at Bosch is covering a large variety of different MEMS-based sensor products for automotive and consumer applications. Most of them use wafer-bonding as capping-technology on wafer-level. The basic features that wafer bonding technologies for MEMS must fulfil for a successful wafer-level packaging process are hermeticity, high bond strength and high temperature stability. Glass-frit and anodic bonding are well and long-term established standard technologies used for hermetic packaging of MEMS on wafer-level. But both technologies require comparatively large chip sizes that are not compatible with the requirements for miniaturization and cost reduction of new consumer sensors. Therefore metallic bonding processes like eutectic bonding with aluminium-germanium were used for current sensor generations. One step further is the realization of hermetic encapsulation and electrical interconnection, if an ASIC wafer serves as a functionalized cap. Cu-Cu thermo-compression and Cu/Sn SLID bonding are promising techniques that are of high interest for MEMS products of the future.

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