This paper reports the performances of several broadband monolithic SiGe MMICs suitable for phased array radar applications. The amplitude and phase control MMIC designs are based on an optimized SiGe PIN diode offered by IBM 5-HP SiGe foundry process. Utilizing this diode, several control circuitries including a broadband (1-20 GHz) monolithic SPDT switch, a five port transfer switch, a 6-bit phase shifter, and a 5-bit attenuator, all operating over 7-11 GHz are designed. Also, the design and performance of a SiGe HBT variable gain cascode amplifier that combines the functionality of an amplifier and an attenuator into one MMIC is described. I. Device DesignThe IBM silicon-gemlaIlium technology permits the integration of advanced MMICs, low power VLS[ digital electronics, and low frequency analog circuits in a single high yield process. The availability of several high performance microwave passive and active devices on the same wafer, including SiGe HBTs, PINs, and Varactors, etc., rerider the IBM SiGe technology a new and exciting paradigm for innovative circuit designs suitable for RF and microwave communication systems. Fundamental to the success of any microwave control function is a high performance PIN device. The performance of the PIN is dependent on its material doping profile as well as its layout. In the IBM 5HP SiGe process, the doping profile of the PIN diode is closely linked to that of the HBT through sharing of three HBT male rial layers, namely, the buried N+ sub-collector layer, the N-collector layer, and finally the P+ SiOe base layer. These layers have been used to form the cathode, the I region, and the anode of the PIN diode, respectively. The material profile in IBM 5HP process is optimized for achieving a high Ft HBT performance which somewhat limits its collector thickness, and consequently the PIN's I-region thickness to approximately half microns. Since the material profIle of the PIN is rigid due to the RBT's perfonnance requirements, the PIN layout design should be optimized to achie;"e optimum microwave performance. Figure 1 shows the layout of such a vertical optimized PIN design having a square anode contact that is surrounded by a continuous cathode contact. Such a device has a periphery-to-area ratio of only 0.56, an important design factor for minimizing the device forward bias microwave resistance (R f ).