Designing of low-power circuit has become a very significant and difficult job in the current Microelectronics domain. Low power devices are the need of present electronics industries. In VLSI circuit design, power dissipation and leakage power present are the critical design constraints as they play a vital role to have a longer battery life (which is highly desirable!). On Chip Designing of Power management is one of the major challenges. Leakage power becomes a crucial parameter as the technology shrinks, for instance as we reduce the channel length from 180 nanometer to 90 nanometer or to 45 nanometers, controlling the effects of leakage power becomes more and more difficult. As the technology shrinks for a high-speed application higher voltage is required by the circuit to maintain the higher speed of operation which increase the amount of leakage in the circuit, numerous techniques have been proposed for leakage reduction in CMOS digital integrated circuit. This review article shows the multiple CMOS integrated circuit reduction techniques.

ESD (electrostatic discharge) protection circuits are always needed in any of the RF (Radio Frequency) circuits to protect the circuit from electrostatic discharge. There are different types of ESD protection circuits. It is very important to protect the circuit from CMOS (Complementary metal oxide semi conductor) devices. In this review process we have discussed ESD protection design in different RF circuits following different recent articles. Present article contains useful information about the causes of ESD, problems arising due to ESD and useful solutions derived by various researchers.