Presented in this paper are decorrelating transformations referred to as DECOR transformations to reduce the power dissipation in adaptive lters. The coe cients generated by the weight update block i n an adaptive lter are passed through a decorrelating block such that fewer bits are required to represent the coe cients. Thus, the size of the arithmetic units in the lter F-block is reduced thereby reducing the power dissipation. The DECOR transform is well suited for narrow-band lters because there is signi cant correlation between adjacent coe cients. In addition, the e ectiveness of DECOR transforms increases with increase in the order of the lter and decrease in coe cient precision. Simulation results indicate reduction in power dissipation in the F-block ranging from 12 to 38 for lter bandwidths ranging from 0:15fs to 0:025fs where fs is the sample rate.
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