Abstract-This paper deals with the issue of electromagnetic interference (EMI) in SiC-JFET inverter power modules, and proposes a solution to limit conducted emissions at high frequencies. SiC-JFET inverters can achieve very fast switching, thereby reducing commutation losses, at the cost of a high level of EMI. In order to limit conducted EMI emissions, it is proposed to integrate small-value common mode (CM) capacitors, directly into the power module. High frequency noise, which is usually difficult to filter, is then contained within the module, thus keeping it far from the external network. This approach is in line with the current trend towards the integration of various functions (such as protection, sensors or drivers) around power devices in modern power modules. To demonstrate this concept, the resulting CM noise was investigated, and compared with a standard configuration. Simulations were used to design the integrated capacitors, and measurements were carried out on an experimental SiC-JFET half-bridge structure. A significant reduction was achieved in the experimentally observed CM conducted emissions, with a very minor influence on the switching waveforms, losses and overall size of the system. The benefits and limitations of this design are discussed, for the case of mid-power range inverters for aircraft applications.

JFET are experimentally stressed to provide data for modelling, inverter and driver design. The experimental setup is described. A surge generator is built and a SiC JFET is stressed. During the stress, a temperature estimation is done at increasing time steps, in order to obtain the full thermal response versus time.

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